[llvm] r347394 - [x86] add checks for asm to test; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 21 07:26:36 PST 2018
Author: spatel
Date: Wed Nov 21 07:26:35 2018
New Revision: 347394
URL: http://llvm.org/viewvc/llvm-project?rev=347394&view=rev
Log:
[x86] add checks for asm to test; NFC
Modified:
llvm/trunk/test/CodeGen/X86/ipra-reg-alias.ll
Modified: llvm/trunk/test/CodeGen/X86/ipra-reg-alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ipra-reg-alias.ll?rev=347394&r1=347393&r2=347394&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ipra-reg-alias.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ipra-reg-alias.ll Wed Nov 21 07:26:35 2018
@@ -1,12 +1,22 @@
-; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
-target triple = "x86_64--"
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-- -enable-ipra -print-regusage -o - 2>&1 < %s | FileCheck %s --check-prefix=DEBUG
+; RUN: llc -mtriple=x86_64-- -enable-ipra -o - < %s | FileCheck %s
+
+; Here only CL is clobbered so CH should not be clobbred, but CX, ECX and RCX
+; should be clobbered.
+; DEBUG: main Clobbered Registers: $ah $al $ax $cl $cx $eax $ecx $eflags $hax $rax $rcx
define i8 @main(i8 %X) {
+; CHECK-LABEL: main:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: movb $5, %cl
+; CHECK-NEXT: # kill: def $al killed $al killed $eax
+; CHECK-NEXT: mulb %cl
+; CHECK-NEXT: addb $5, %al
+; CHECK-NEXT: retq
%inc = add i8 %X, 1
%inc2 = mul i8 %inc, 5
-; Here only CL is clobbred so CH should not be clobbred, but CX, ECX and RCX
-; should be clobbered.
-; CHECK: main Clobbered Registers: $ah $al $ax $cl $cx $eax $ecx $eflags $hax $rax $rcx
ret i8 %inc2
}
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