[PATCH] D54785: add cascade lake arch in X86 target
Chen Jianping via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 21 00:55:54 PST 2018
Jianping created this revision.
Jianping added reviewers: craig.topper, smaslov, liutianle, LuoYuanke.
Herald added subscribers: llvm-commits, kristina.
add cascade lake arch in X86 target
Repository:
rL LLVM
https://reviews.llvm.org/D54785
Files:
include/llvm/Support/X86TargetParser.def
lib/Support/Host.cpp
lib/Target/X86/X86.td
test/CodeGen/X86/cpus-intel.ll
Index: test/CodeGen/X86/cpus-intel.ll
===================================================================
--- test/CodeGen/X86/cpus-intel.ll
+++ test/CodeGen/X86/cpus-intel.ll
@@ -34,6 +34,7 @@
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cascadelake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake-client 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake-server 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
Index: lib/Target/X86/X86.td
===================================================================
--- lib/Target/X86/X86.td
+++ lib/Target/X86/X86.td
@@ -883,6 +883,17 @@
def : SkylakeServerProc<"skylake-avx512">;
def : SkylakeServerProc<"skx">; // Legacy alias.
+def CLXFeatures : ProcessorFeatures<SKXFeatures.Value, [
+ FeatureVNNI
+]>;
+
+class CascadelakeProc<string Name> : ProcModel<Name, SkylakeServerModel,
+ CLXFeatures.Value, [
+ FeatureHasFastGather,
+ FeaturePOPCNTFalseDeps
+]>;
+def : CascadelakeProc<"cascadelake">;
+
def CNLFeatures : ProcessorFeatures<SKLFeatures.Value, [
FeatureAVX512,
FeatureCDI,
Index: lib/Support/Host.cpp
===================================================================
--- lib/Support/Host.cpp
+++ lib/Support/Host.cpp
@@ -702,6 +702,12 @@
break;
}
+ if (Features & (1 << X86::FEATURE_AVX512VNNI)) {
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_CASCADELAKE;
+ break;
+ }
+
if (Features & (1 << X86::FEATURE_AVX512VL)) {
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512;
Index: include/llvm/Support/X86TargetParser.def
===================================================================
--- include/llvm/Support/X86TargetParser.def
+++ include/llvm/Support/X86TargetParser.def
@@ -106,6 +106,7 @@
X86_CPU_SUBTYPE ("k6-2", AMDPENTIUM_K62)
X86_CPU_SUBTYPE ("k6-3", AMDPENTIUM_K63)
X86_CPU_SUBTYPE ("geode", AMDPENTIUM_GEODE)
+X86_CPU_SUBTYPE ("cascadelake", INTEL_COREI7_CASCADELAKE)
#undef X86_CPU_SUBTYPE_COMPAT
#undef X86_CPU_SUBTYPE
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