[PATCH] D52653: [CodeGen, AArch64] Combine Interleaved Loads which are not covered by the Vectorizer

[Dávid Bolvanský via Phabricator via llvm-commits]

xbolva00 added inline comments.


================
Comment at: llvm/trunk/lib/CodeGen/InterleavedLoadCombinePass.cpp:814
+    // Both operands produced sensible results?
+    else if ((LHS.BB == RHS.BB) && (LHS.PV == LHS.PV)) {
+      Result.BB = LHS.BB;
----------------
self-comparison always evaluates to true [-Wtautological-compare]



Repository:
  rL LLVM

https://reviews.llvm.org/D52653