[PATCH] D54668: [X86] Attempt to improve v32i8/v64i8 multiply lowering by applying the v16i8 non-avx2 algorithm to each 128-bit lane.

[Phabricator via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL347240: [X86] Attempt to improve v32i8/v64i8 multiply lowering by applying the v16i8… (authored by ctopper, committed by ).

Repository:
  rL LLVM

https://reviews.llvm.org/D54668

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/avx2-arith.ll
  llvm/trunk/test/CodeGen/X86/min-legal-vector-width.ll
  llvm/trunk/test/CodeGen/X86/pmul.ll
  llvm/trunk/test/CodeGen/X86/prefer-avx256-wide-mul.ll
  llvm/trunk/test/CodeGen/X86/vector-mul.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll

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