[llvm] r347228 - [WebAssembly] replaced .param/.result by .functype
Wouter van Oortmerssen via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 19 09:10:36 PST 2018
Author: aardappel
Date: Mon Nov 19 09:10:36 2018
New Revision: 347228
URL: http://llvm.org/viewvc/llvm-project?rev=347228&view=rev
Log:
[WebAssembly] replaced .param/.result by .functype
Summary:
This makes it easier/cleaner to generate a single signature from
this directive. Also:
- Adds the symbol name, such that we don't depend on the location
of this directive anymore.
- Actually constructs the signature in the assembler, and make the
assembler own it.
- Refactor the use of MVT vs ValType in the streamer and assembler
to require less conversions overall.
- Changed 700 or so tests to use it.
Reviewers: sbc100, dschuff
Subscribers: jgravelle-google, eraman, aheejin, sunfish, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D54652
Modified:
llvm/trunk/include/llvm/MC/MCAsmMacro.h
llvm/trunk/lib/MC/MCParser/AsmLexer.cpp
llvm/trunk/lib/MC/MCParser/MCAsmLexer.cpp
llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
llvm/trunk/test/CodeGen/WebAssembly/address-offsets.ll
llvm/trunk/test/CodeGen/WebAssembly/atomic-mem-consistency.ll
llvm/trunk/test/CodeGen/WebAssembly/atomic-rmw.ll
llvm/trunk/test/CodeGen/WebAssembly/byval.ll
llvm/trunk/test/CodeGen/WebAssembly/call.ll
llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll
llvm/trunk/test/CodeGen/WebAssembly/comparisons-f32.ll
llvm/trunk/test/CodeGen/WebAssembly/comparisons-f64.ll
llvm/trunk/test/CodeGen/WebAssembly/comparisons-i32.ll
llvm/trunk/test/CodeGen/WebAssembly/comparisons-i64.ll
llvm/trunk/test/CodeGen/WebAssembly/conv-trap.ll
llvm/trunk/test/CodeGen/WebAssembly/conv.ll
llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll
llvm/trunk/test/CodeGen/WebAssembly/f16.ll
llvm/trunk/test/CodeGen/WebAssembly/f32.ll
llvm/trunk/test/CodeGen/WebAssembly/f64.ll
llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i24.ll
llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i256.ll
llvm/trunk/test/CodeGen/WebAssembly/frem.ll
llvm/trunk/test/CodeGen/WebAssembly/func.ll
llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll
llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts.ll
llvm/trunk/test/CodeGen/WebAssembly/global.ll
llvm/trunk/test/CodeGen/WebAssembly/i128-returned.ll
llvm/trunk/test/CodeGen/WebAssembly/i128.ll
llvm/trunk/test/CodeGen/WebAssembly/i32-load-store-alignment.ll
llvm/trunk/test/CodeGen/WebAssembly/i32.ll
llvm/trunk/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
llvm/trunk/test/CodeGen/WebAssembly/i64.ll
llvm/trunk/test/CodeGen/WebAssembly/immediates.ll
llvm/trunk/test/CodeGen/WebAssembly/indirect-import.ll
llvm/trunk/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll
llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll
llvm/trunk/test/CodeGen/WebAssembly/load.ll
llvm/trunk/test/CodeGen/WebAssembly/lower-global-dtors.ll
llvm/trunk/test/CodeGen/WebAssembly/main-declaration.ll
llvm/trunk/test/CodeGen/WebAssembly/main-no-args.ll
llvm/trunk/test/CodeGen/WebAssembly/main-with-args.ll
llvm/trunk/test/CodeGen/WebAssembly/memory-addr32.ll
llvm/trunk/test/CodeGen/WebAssembly/offset-atomics.ll
llvm/trunk/test/CodeGen/WebAssembly/offset-folding.ll
llvm/trunk/test/CodeGen/WebAssembly/offset.ll
llvm/trunk/test/CodeGen/WebAssembly/reg-stackify.ll
llvm/trunk/test/CodeGen/WebAssembly/return-int32.ll
llvm/trunk/test/CodeGen/WebAssembly/return-void.ll
llvm/trunk/test/CodeGen/WebAssembly/returned.ll
llvm/trunk/test/CodeGen/WebAssembly/select.ll
llvm/trunk/test/CodeGen/WebAssembly/signext-inreg.ll
llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-comparisons.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-conversions.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-ext-load-trunc-store.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-load-store-alignment.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-select.ll
llvm/trunk/test/CodeGen/WebAssembly/simd-sext-inreg.ll
llvm/trunk/test/CodeGen/WebAssembly/simd.ll
llvm/trunk/test/CodeGen/WebAssembly/store.ll
llvm/trunk/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll
llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll
llvm/trunk/test/CodeGen/WebAssembly/userstack.ll
llvm/trunk/test/CodeGen/WebAssembly/varargs.ll
llvm/trunk/test/MC/WebAssembly/basic-assembly.s
Modified: llvm/trunk/include/llvm/MC/MCAsmMacro.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmMacro.h?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCAsmMacro.h (original)
+++ llvm/trunk/include/llvm/MC/MCAsmMacro.h Mon Nov 19 09:10:36 2018
@@ -52,7 +52,7 @@ public:
Pipe, PipePipe, Caret,
Amp, AmpAmp, Exclaim, ExclaimEqual, Percent, Hash,
Less, LessEqual, LessLess, LessGreater,
- Greater, GreaterEqual, GreaterGreater, At,
+ Greater, GreaterEqual, GreaterGreater, At, MinusGreater,
// MIPS unary expression operators such as %neg.
PercentCall16, PercentCall_Hi, PercentCall_Lo, PercentDtprel_Hi,
Modified: llvm/trunk/lib/MC/MCParser/AsmLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmLexer.cpp?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/AsmLexer.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/AsmLexer.cpp Mon Nov 19 09:10:36 2018
@@ -627,7 +627,6 @@ AsmToken AsmLexer::LexToken() {
return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 1));
case ':': return AsmToken(AsmToken::Colon, StringRef(TokStart, 1));
case '+': return AsmToken(AsmToken::Plus, StringRef(TokStart, 1));
- case '-': return AsmToken(AsmToken::Minus, StringRef(TokStart, 1));
case '~': return AsmToken(AsmToken::Tilde, StringRef(TokStart, 1));
case '(': return AsmToken(AsmToken::LParen, StringRef(TokStart, 1));
case ')': return AsmToken(AsmToken::RParen, StringRef(TokStart, 1));
@@ -646,6 +645,12 @@ AsmToken AsmLexer::LexToken() {
return AsmToken(AsmToken::EqualEqual, StringRef(TokStart, 2));
}
return AsmToken(AsmToken::Equal, StringRef(TokStart, 1));
+ case '-':
+ if (*CurPtr == '>') {
+ ++CurPtr;
+ return AsmToken(AsmToken::MinusGreater, StringRef(TokStart, 2));
+ }
+ return AsmToken(AsmToken::Minus, StringRef(TokStart, 1));
case '|':
if (*CurPtr == '|') {
++CurPtr;
Modified: llvm/trunk/lib/MC/MCParser/MCAsmLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/MCAsmLexer.cpp?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/MCAsmLexer.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/MCAsmLexer.cpp Mon Nov 19 09:10:36 2018
@@ -85,6 +85,7 @@ void AsmToken::dump(raw_ostream &OS) con
case AsmToken::LessGreater: OS << "LessGreater"; break;
case AsmToken::LessLess: OS << "LessLess"; break;
case AsmToken::Minus: OS << "Minus"; break;
+ case AsmToken::MinusGreater: OS << "MinusGreater"; break;
case AsmToken::Percent: OS << "Percent"; break;
case AsmToken::Pipe: OS << "Pipe"; break;
case AsmToken::PipePipe: OS << "PipePipe"; break;
Modified: llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp Mon Nov 19 09:10:36 2018
@@ -133,6 +133,9 @@ class WebAssemblyAsmParser final : publi
MCAsmParser &Parser;
MCAsmLexer &Lexer;
+ // Much like WebAssemblyAsmPrinter in the backend, we have to own these.
+ std::vector<std::unique_ptr<wasm::WasmSignature>> Signatures;
+
public:
WebAssemblyAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
@@ -141,6 +144,10 @@ public:
setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
}
+ void addSignature(std::unique_ptr<wasm::WasmSignature> &&Sig) {
+ Signatures.push_back(std::move(Sig));
+ }
+
#define GET_ASSEMBLER_HEADER
#include "WebAssemblyGenAsmMatcher.inc"
@@ -168,39 +175,40 @@ public:
return false;
}
+ StringRef ExpectIdent() {
+ if (!Lexer.is(AsmToken::Identifier)) {
+ Error("Expected identifier, got: ", Lexer.getTok());
+ return StringRef();
+ }
+ auto Name = Lexer.getTok().getString();
+ Parser.Lex();
+ return Name;
+ }
- std::pair<MVT::SimpleValueType, unsigned>
- ParseRegType(const StringRef &RegType) {
- // Derive type from .param .local decls, or the instruction itself.
- return StringSwitch<std::pair<MVT::SimpleValueType, unsigned>>(RegType)
- .Case("i32", {MVT::i32, wasm::WASM_TYPE_I32})
- .Case("i64", {MVT::i64, wasm::WASM_TYPE_I64})
- .Case("f32", {MVT::f32, wasm::WASM_TYPE_F32})
- .Case("f64", {MVT::f64, wasm::WASM_TYPE_F64})
- .Case("i8x16", {MVT::v16i8, wasm::WASM_TYPE_V128})
- .Case("i16x8", {MVT::v8i16, wasm::WASM_TYPE_V128})
- .Case("i32x4", {MVT::v4i32, wasm::WASM_TYPE_V128})
- .Case("i64x2", {MVT::v2i64, wasm::WASM_TYPE_V128})
- .Case("f32x4", {MVT::v4f32, wasm::WASM_TYPE_V128})
- .Case("f64x2", {MVT::v2f64, wasm::WASM_TYPE_V128})
- // arbitrarily chosen vector type to associate with "v128"
- // FIXME: should these be EVTs to avoid this arbitrary hack? Do we want
- // to accept more specific SIMD register types?
- .Case("v128", {MVT::v16i8, wasm::WASM_TYPE_V128})
- .Default({MVT::INVALID_SIMPLE_VALUE_TYPE, wasm::WASM_TYPE_NORESULT});
+ Optional<wasm::ValType> ParseType(const StringRef &Type) {
+ // FIXME: can't use StringSwitch because wasm::ValType doesn't have a
+ // "invalid" value.
+ if (Type == "i32") return wasm::ValType::I32;
+ if (Type == "i64") return wasm::ValType::I64;
+ if (Type == "f32") return wasm::ValType::F32;
+ if (Type == "f64") return wasm::ValType::F64;
+ if (Type == "v128" || Type == "i8x16" || Type == "i16x8" ||
+ Type == "i32x4" || Type == "i64x2" || Type == "f32x4" ||
+ Type == "f64x2") return wasm::ValType::V128;
+ return Optional<wasm::ValType>();
}
- bool ParseRegTypeList(std::vector<MVT> &Types) {
+ bool ParseRegTypeList(SmallVectorImpl<wasm::ValType> &Types) {
while (Lexer.is(AsmToken::Identifier)) {
- auto RegType = ParseRegType(Lexer.getTok().getString()).first;
- if (RegType == MVT::INVALID_SIMPLE_VALUE_TYPE)
+ auto Type = ParseType(Lexer.getTok().getString());
+ if (!Type)
return true;
- Types.push_back(RegType);
+ Types.push_back(Type.getValue());
Parser.Lex();
if (!IsNext(AsmToken::Comma))
break;
}
- return Expect(AsmToken::EndOfStatement, "EOL");
+ return false;
}
void ParseSingleInteger(bool IsNegative, OperandVector &Operands) {
@@ -343,44 +351,47 @@ public:
// TODO: any time we return an error, at least one token must have been
// consumed, otherwise this will not signal an error to the caller.
if (DirectiveID.getString() == ".globaltype") {
- if (!Lexer.is(AsmToken::Identifier))
- return Error("Expected symbol name after .globaltype directive, got: ",
- Lexer.getTok());
- auto Name = Lexer.getTok().getString();
- Parser.Lex();
- if (!IsNext(AsmToken::Comma))
- return Error("Expected `,`, got: ", Lexer.getTok());
- if (!Lexer.is(AsmToken::Identifier))
- return Error("Expected type in .globaltype directive, got: ",
- Lexer.getTok());
- auto Type = ParseRegType(Lexer.getTok().getString()).second;
- if (Type == wasm::WASM_TYPE_NORESULT)
- return Error("Unknown type in .globaltype directive: ",
- Lexer.getTok());
- Parser.Lex();
+ auto SymName = ExpectIdent();
+ if (SymName.empty()) return true;
+ if (Expect(AsmToken::Comma, ",")) return true;
+ auto TypeTok = Lexer.getTok();
+ auto TypeName = ExpectIdent();
+ if (TypeName.empty()) return true;
+ auto Type = ParseType(TypeName);
+ if (!Type)
+ return Error("Unknown type in .globaltype directive: ", TypeTok);
// Now set this symbol with the correct type.
auto WasmSym = cast<MCSymbolWasm>(
- TOut.getStreamer().getContext().getOrCreateSymbol(Name));
+ TOut.getStreamer().getContext().getOrCreateSymbol(SymName));
WasmSym->setType(wasm::WASM_SYMBOL_TYPE_GLOBAL);
- WasmSym->setGlobalType(wasm::WasmGlobalType{uint8_t(Type), true});
+ WasmSym->setGlobalType(
+ wasm::WasmGlobalType{uint8_t(Type.getValue()), true});
// And emit the directive again.
TOut.emitGlobalType(WasmSym);
return Expect(AsmToken::EndOfStatement, "EOL");
- } else if (DirectiveID.getString() == ".param") {
- std::vector<MVT> Params;
- if (ParseRegTypeList(Params)) return true;
- TOut.emitParam(nullptr /* unused */, Params);
- return false;
- } else if (DirectiveID.getString() == ".result") {
- std::vector<MVT> Results;
- if (ParseRegTypeList(Results)) return true;
- TOut.emitResult(nullptr /* unused */, Results);
- return false;
+ } else if (DirectiveID.getString() == ".functype") {
+ auto SymName = ExpectIdent();
+ if (SymName.empty()) return true;
+ auto WasmSym = cast<MCSymbolWasm>(
+ TOut.getStreamer().getContext().getOrCreateSymbol(SymName));
+ auto Signature = make_unique<wasm::WasmSignature>();
+ if (Expect(AsmToken::LParen, "(")) return true;
+ if (ParseRegTypeList(Signature->Params)) return true;
+ if (Expect(AsmToken::RParen, ")")) return true;
+ if (Expect(AsmToken::MinusGreater, "->")) return true;
+ if (Expect(AsmToken::LParen, "(")) return true;
+ if (ParseRegTypeList(Signature->Returns)) return true;
+ if (Expect(AsmToken::RParen, ")")) return true;
+ WasmSym->setSignature(Signature.get());
+ addSignature(std::move(Signature));
+ WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION);
+ TOut.emitFunctionType(WasmSym);
+ return Expect(AsmToken::EndOfStatement, "EOL");
} else if (DirectiveID.getString() == ".local") {
- std::vector<MVT> Locals;
+ SmallVector<wasm::ValType, 4> Locals;
if (ParseRegTypeList(Locals)) return true;
TOut.emitLocal(Locals);
- return false;
+ return Expect(AsmToken::EndOfStatement, "EOL");
}
return true; // We didn't process this directive.
}
Modified: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp Mon Nov 19 09:10:36 2018
@@ -39,43 +39,19 @@ WebAssemblyTargetAsmStreamer::WebAssembl
WebAssemblyTargetWasmStreamer::WebAssemblyTargetWasmStreamer(MCStreamer &S)
: WebAssemblyTargetStreamer(S) {}
-static void PrintTypes(formatted_raw_ostream &OS, ArrayRef<MVT> Types) {
+static void PrintTypes(formatted_raw_ostream &OS, ArrayRef<wasm::ValType> Types) {
bool First = true;
- for (MVT Type : Types) {
+ for (auto Type : Types) {
if (First)
First = false;
else
OS << ", ";
- OS << WebAssembly::TypeToString(WebAssembly::toValType(Type));
+ OS << WebAssembly::TypeToString(Type);
}
OS << '\n';
}
-void WebAssemblyTargetAsmStreamer::emitParam(MCSymbol *Symbol,
- ArrayRef<MVT> Types) {
- if (!Types.empty()) {
- OS << "\t.param \t";
-
- // FIXME: Currently this applies to the "current" function; it may
- // be cleaner to specify an explicit symbol as part of the directive.
-
- PrintTypes(OS, Types);
- }
-}
-
-void WebAssemblyTargetAsmStreamer::emitResult(MCSymbol *Symbol,
- ArrayRef<MVT> Types) {
- if (!Types.empty()) {
- OS << "\t.result \t";
-
- // FIXME: Currently this applies to the "current" function; it may
- // be cleaner to specify an explicit symbol as part of the directive.
-
- PrintTypes(OS, Types);
- }
-}
-
-void WebAssemblyTargetAsmStreamer::emitLocal(ArrayRef<MVT> Types) {
+void WebAssemblyTargetAsmStreamer::emitLocal(ArrayRef<wasm::ValType> Types) {
if (!Types.empty()) {
OS << "\t.local \t";
PrintTypes(OS, Types);
@@ -84,19 +60,20 @@ void WebAssemblyTargetAsmStreamer::emitL
void WebAssemblyTargetAsmStreamer::emitEndFunc() { OS << "\t.endfunc\n"; }
-void WebAssemblyTargetAsmStreamer::emitIndirectFunctionType(
- MCSymbolWasm *Symbol) {
- OS << "\t.functype\t" << Symbol->getName();
- if (Symbol->getSignature()->Returns.empty())
- OS << ", void";
- else {
- assert(Symbol->getSignature()->Returns.size() == 1);
- OS << ", "
- << WebAssembly::TypeToString(Symbol->getSignature()->Returns.front());
+void WebAssemblyTargetAsmStreamer::emitFunctionType(MCSymbolWasm *Symbol) {
+ OS << "\t.functype\t" << Symbol->getName() << " (";
+ auto &Params = Symbol->getSignature()->Params;
+ for (auto &Ty : Params) {
+ if (&Ty != &Params[0]) OS << ", ";
+ OS << WebAssembly::TypeToString(Ty);
+ }
+ OS << ") -> (";
+ auto &Returns = Symbol->getSignature()->Returns;
+ for (auto &Ty : Returns) {
+ if (&Ty != &Returns[0]) OS << ", ";
+ OS << WebAssembly::TypeToString(Ty);
}
- for (auto Ty : Symbol->getSignature()->Params)
- OS << ", " << WebAssembly::TypeToString(Ty);
- OS << '\n';
+ OS << ")\n";
}
void WebAssemblyTargetAsmStreamer::emitGlobalType(MCSymbolWasm *Sym) {
@@ -131,19 +108,9 @@ void WebAssemblyTargetAsmStreamer::emitI
OS << "\t.indidx \t" << *Value << '\n';
}
-void WebAssemblyTargetWasmStreamer::emitParam(MCSymbol *Symbol,
- ArrayRef<MVT> Types) {
- // The Symbol already has its signature
-}
-
-void WebAssemblyTargetWasmStreamer::emitResult(MCSymbol *Symbol,
- ArrayRef<MVT> Types) {
- // The Symbol already has its signature
-}
-
-void WebAssemblyTargetWasmStreamer::emitLocal(ArrayRef<MVT> Types) {
- SmallVector<std::pair<MVT, uint32_t>, 4> Grouped;
- for (MVT Type : Types) {
+void WebAssemblyTargetWasmStreamer::emitLocal(ArrayRef<wasm::ValType> Types) {
+ SmallVector<std::pair<wasm::ValType, uint32_t>, 4> Grouped;
+ for (auto Type : Types) {
if (Grouped.empty() || Grouped.back().first != Type)
Grouped.push_back(std::make_pair(Type, 1));
else
@@ -153,7 +120,7 @@ void WebAssemblyTargetWasmStreamer::emit
Streamer.EmitULEB128IntValue(Grouped.size());
for (auto Pair : Grouped) {
Streamer.EmitULEB128IntValue(Pair.second);
- emitValueType(WebAssembly::toValType(Pair.first));
+ emitValueType(Pair.first);
}
}
@@ -165,8 +132,7 @@ void WebAssemblyTargetWasmStreamer::emit
llvm_unreachable(".indidx encoding not yet implemented");
}
-void WebAssemblyTargetWasmStreamer::emitIndirectFunctionType(
- MCSymbolWasm *Symbol) {
+void WebAssemblyTargetWasmStreamer::emitFunctionType(MCSymbolWasm *Symbol) {
// Symbol already has its arguments and result set.
Symbol->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION);
}
Modified: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h (original)
+++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h Mon Nov 19 09:10:36 2018
@@ -31,16 +31,12 @@ class WebAssemblyTargetStreamer : public
public:
explicit WebAssemblyTargetStreamer(MCStreamer &S);
- /// .param
- virtual void emitParam(MCSymbol *Symbol, ArrayRef<MVT> Types) = 0;
- /// .result
- virtual void emitResult(MCSymbol *Symbol, ArrayRef<MVT> Types) = 0;
/// .local
- virtual void emitLocal(ArrayRef<MVT> Types) = 0;
+ virtual void emitLocal(ArrayRef<wasm::ValType> Types) = 0;
/// .endfunc
virtual void emitEndFunc() = 0;
/// .functype
- virtual void emitIndirectFunctionType(MCSymbolWasm *Symbol) = 0;
+ virtual void emitFunctionType(MCSymbolWasm *Symbol) = 0;
/// .indidx
virtual void emitIndIdx(const MCExpr *Value) = 0;
/// .globaltype
@@ -61,11 +57,9 @@ class WebAssemblyTargetAsmStreamer final
public:
WebAssemblyTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS);
- void emitParam(MCSymbol *Symbol, ArrayRef<MVT> Types) override;
- void emitResult(MCSymbol *Symbol, ArrayRef<MVT> Types) override;
- void emitLocal(ArrayRef<MVT> Types) override;
+ void emitLocal(ArrayRef<wasm::ValType> Types) override;
void emitEndFunc() override;
- void emitIndirectFunctionType(MCSymbolWasm *Symbol) override;
+ void emitFunctionType(MCSymbolWasm *Symbol) override;
void emitIndIdx(const MCExpr *Value) override;
void emitGlobalType(MCSymbolWasm *Sym) override;
void emitEventType(MCSymbolWasm *Sym) override;
@@ -77,11 +71,9 @@ class WebAssemblyTargetWasmStreamer fina
public:
explicit WebAssemblyTargetWasmStreamer(MCStreamer &S);
- void emitParam(MCSymbol *Symbol, ArrayRef<MVT> Types) override;
- void emitResult(MCSymbol *Symbol, ArrayRef<MVT> Types) override;
- void emitLocal(ArrayRef<MVT> Types) override;
+ void emitLocal(ArrayRef<wasm::ValType> Types) override;
void emitEndFunc() override;
- void emitIndirectFunctionType(MCSymbolWasm *Symbol) override;
+ void emitFunctionType(MCSymbolWasm *Symbol) override;
void emitIndIdx(const MCExpr *Value) override;
void emitGlobalType(MCSymbolWasm *Sym) override;
void emitEventType(MCSymbolWasm *Sym) override;
@@ -94,15 +86,13 @@ public:
explicit WebAssemblyTargetNullStreamer(MCStreamer &S)
: WebAssemblyTargetStreamer(S) {}
- void emitParam(MCSymbol *Symbol, ArrayRef<MVT> Types) override {}
- void emitResult(MCSymbol *Symbol, ArrayRef<MVT> Types) override {}
- void emitLocal(ArrayRef<MVT> Types) override {}
+ void emitLocal(ArrayRef<wasm::ValType>) override {}
void emitEndFunc() override {}
- void emitIndirectFunctionType(MCSymbolWasm *Symbol) override {}
- void emitIndIdx(const MCExpr *Value) override {}
- void emitGlobalType(MCSymbolWasm *Sym) override {}
- void emitEventType(MCSymbolWasm *Sym) override {}
- void emitImportModule(MCSymbolWasm *Sym, StringRef ModuleName) override {}
+ void emitFunctionType(MCSymbolWasm *) override {}
+ void emitIndIdx(const MCExpr *) override {}
+ void emitGlobalType(MCSymbolWasm *) override {}
+ void emitEventType(MCSymbolWasm *) override {}
+ void emitImportModule(MCSymbolWasm *, StringRef) override {}
};
} // end namespace llvm
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp Mon Nov 19 09:10:36 2018
@@ -104,7 +104,7 @@ void WebAssemblyAsmPrinter::EmitEndOfAsm
// infer the type from a call). With object files it applies to all
// imports. so fix the names and the tests, or rethink how import
// delcarations work in asm files.
- getTargetStreamer()->emitIndirectFunctionType(Sym);
+ getTargetStreamer()->emitFunctionType(Sym);
if (TM.getTargetTriple().isOSBinFormatWasm() &&
F.hasFnAttribute("wasm-import-module")) {
@@ -166,7 +166,7 @@ void WebAssemblyAsmPrinter::EmitFunction
addSignature(std::move(Signature));
// FIXME: clean up how params and results are emitted (use signatures)
- getTargetStreamer()->emitParam(CurrentFnSym, ParamVTs);
+ getTargetStreamer()->emitFunctionType(WasmSym);
// Emit the function index.
if (MDNode *Idx = F.getMetadata("wasm.index")) {
@@ -176,8 +176,9 @@ void WebAssemblyAsmPrinter::EmitFunction
cast<ConstantAsMetadata>(Idx->getOperand(0))->getValue()));
}
- getTargetStreamer()->emitResult(CurrentFnSym, ResultVTs);
- getTargetStreamer()->emitLocal(MFI->getLocals());
+ SmallVector<wasm::ValType, 16> Locals;
+ ValTypesFromMVTs(MFI->getLocals(), Locals);
+ getTargetStreamer()->emitLocal(Locals);
AsmPrinter::EmitFunctionBodyStart();
}
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp Mon Nov 19 09:10:36 2018
@@ -64,13 +64,17 @@ void llvm::ComputeSignatureVTs(const Fun
Params.push_back(PtrVT);
}
+void llvm::ValTypesFromMVTs(const ArrayRef<MVT> &In,
+ SmallVectorImpl<wasm::ValType> &Out) {
+ for (MVT Ty : In)
+ Out.push_back(WebAssembly::toValType(Ty));
+}
+
std::unique_ptr<wasm::WasmSignature>
llvm::SignatureFromMVTs(const SmallVectorImpl<MVT> &Results,
const SmallVectorImpl<MVT> &Params) {
auto Sig = make_unique<wasm::WasmSignature>();
- for (MVT Ty : Results)
- Sig->Returns.push_back(WebAssembly::toValType(Ty));
- for (MVT Ty : Params)
- Sig->Params.push_back(WebAssembly::toValType(Ty));
+ ValTypesFromMVTs(Results, Sig->Returns);
+ ValTypesFromMVTs(Params, Sig->Params);
return Sig;
}
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h Mon Nov 19 09:10:36 2018
@@ -129,6 +129,9 @@ void ComputeSignatureVTs(const FunctionT
const TargetMachine &TM, SmallVectorImpl<MVT> &Params,
SmallVectorImpl<MVT> &Results);
+void ValTypesFromMVTs(const ArrayRef<MVT> &In,
+ SmallVectorImpl<wasm::ValType> &Out);
+
std::unique_ptr<wasm::WasmSignature>
SignatureFromMVTs(const SmallVectorImpl<MVT> &Results,
const SmallVectorImpl<MVT> &Params);
Modified: llvm/trunk/test/CodeGen/WebAssembly/address-offsets.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/address-offsets.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/address-offsets.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/address-offsets.ll Mon Nov 19 09:10:36 2018
@@ -9,7 +9,7 @@ target triple = "wasm32-unknown-unknown"
@g = external global [0 x i32], align 4
; CHECK-LABEL: load_test0:
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test0 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}}
; CHECK-NEXT: i32.load $push1=, g+40($pop0){{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -19,7 +19,7 @@ define i32 @load_test0() {
}
; CHECK-LABEL: load_test0_noinbounds:
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test0_noinbounds () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}}
; CHECK-NEXT: i32.load $push1=, g+40($pop0){{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -33,8 +33,7 @@ define i32 @load_test0_noinbounds() {
; Likewise for stores.
; CHECK-LABEL: load_test1:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test1 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
@@ -47,8 +46,7 @@ define i32 @load_test1(i32 %n) {
}
; CHECK-LABEL: load_test2:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test2 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
@@ -61,8 +59,7 @@ define i32 @load_test2(i32 %n) {
}
; CHECK-LABEL: load_test3:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test3 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
@@ -75,8 +72,7 @@ define i32 @load_test3(i32 %n) {
}
; CHECK-LABEL: load_test4:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test4 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
@@ -88,8 +84,7 @@ define i32 @load_test4(i32 %n) {
}
; CHECK-LABEL: load_test5:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test5 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
@@ -101,8 +96,7 @@ define i32 @load_test5(i32 %n) {
}
; CHECK-LABEL: load_test6:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test6 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
@@ -115,8 +109,7 @@ define i32 @load_test6(i32 %n) {
}
; CHECK-LABEL: load_test7:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test7 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
@@ -129,8 +122,7 @@ define i32 @load_test7(i32 %n) {
}
; CHECK-LABEL: load_test8:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test8 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
@@ -143,7 +135,7 @@ define i32 @load_test8(i32 %n) {
}
; CHECK-LABEL: load_test9:
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test9 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}}
; CHECK-NEXT: i32.load $push1=, g-40($pop0){{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -153,8 +145,7 @@ define i32 @load_test9() {
}
; CHECK-LABEL: load_test10:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test10 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEXT: i32.const $push2=, g-40{{$}}
@@ -169,8 +160,7 @@ define i32 @load_test10(i32 %n) {
}
; CHECK-LABEL: load_test11:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test11 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load $push0=, 40($0){{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @load_test11(i32* %p) {
@@ -180,8 +170,7 @@ define i32 @load_test11(i32* %p) {
}
; CHECK-LABEL: load_test11_noinbounds:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test11_noinbounds (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 40{{$}}
; CHECK-NEXT: i32.add $push1=, $0, $pop0{{$}}
; CHECK-NEXT: i32.load $push2=, 0($pop1){{$}}
@@ -193,8 +182,7 @@ define i32 @load_test11_noinbounds(i32*
}
; CHECK-LABEL: load_test12:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test12 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -210,8 +198,7 @@ define i32 @load_test12(i32* %p, i32 %n)
}
; CHECK-LABEL: load_test13:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test13 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -227,8 +214,7 @@ define i32 @load_test13(i32* %p, i32 %n)
}
; CHECK-LABEL: load_test14:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test14 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -242,8 +228,7 @@ define i32 @load_test14(i32* %p, i32 %n)
}
; CHECK-LABEL: load_test15:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test15 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -259,8 +244,7 @@ define i32 @load_test15(i32* %p, i32 %n)
}
; CHECK-LABEL: load_test16:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test16 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -276,8 +260,7 @@ define i32 @load_test16(i32* %p, i32 %n)
}
; CHECK-LABEL: load_test17:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test17 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -293,8 +276,7 @@ define i32 @load_test17(i32* %p, i32 %n)
}
; CHECK-LABEL: load_test18:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test18 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -308,8 +290,7 @@ define i32 @load_test18(i32* %p, i32 %n)
}
; CHECK-LABEL: load_test19:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test19 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -325,8 +306,7 @@ define i32 @load_test19(i32* %p, i32 %n)
}
; CHECK-LABEL: load_test20:
-; CHECK-NEXT: param i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test20 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, -40{{$}}
; CHECK-NEXT: i32.add $push1=, $0, $pop0{{$}}
; CHECK-NEXT: i32.load $push2=, 0($pop1){{$}}
@@ -338,8 +318,7 @@ define i32 @load_test20(i32* %p) {
}
; CHECK-LABEL: load_test21:
-; CHECK-NEXT: param i32, i32{{$}}
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype load_test21 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -355,7 +334,7 @@ define i32 @load_test21(i32* %p, i32 %n)
}
; CHECK-LABEL: store_test0:
-; CHECK-NEXT: param i32{{$}}
+; CHECK-NEXT: .functype store_test0 (i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}}
; CHECK-NEXT: i32.store g+40($pop0), $0{{$}}
; CHECK-NEXT: return{{$}}
@@ -365,7 +344,7 @@ define void @store_test0(i32 %i) {
}
; CHECK-LABEL: store_test0_noinbounds:
-; CHECK-NEXT: param i32{{$}}
+; CHECK-NEXT: .functype store_test0_noinbounds (i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}}
; CHECK-NEXT: i32.store g+40($pop0), $0{{$}}
; CHECK-NEXT: return{{$}}
@@ -375,7 +354,7 @@ define void @store_test0_noinbounds(i32
}
; CHECK-LABEL: store_test1:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test1 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
@@ -388,7 +367,7 @@ define void @store_test1(i32 %n, i32 %i)
}
; CHECK-LABEL: store_test2:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test2 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
@@ -401,7 +380,7 @@ define void @store_test2(i32 %n, i32 %i)
}
; CHECK-LABEL: store_test3:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test3 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
@@ -414,7 +393,7 @@ define void @store_test3(i32 %n, i32 %i)
}
; CHECK-LABEL: store_test4:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test4 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
@@ -426,7 +405,7 @@ define void @store_test4(i32 %n, i32 %i)
}
; CHECK-LABEL: store_test5:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test5 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
@@ -438,7 +417,7 @@ define void @store_test5(i32 %n, i32 %i)
}
; CHECK-LABEL: store_test6:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test6 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
@@ -451,7 +430,7 @@ define void @store_test6(i32 %n, i32 %i)
}
; CHECK-LABEL: store_test7:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test7 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
@@ -464,7 +443,7 @@ define void @store_test7(i32 %n, i32 %i)
}
; CHECK-LABEL: store_test8:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test8 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
@@ -477,7 +456,7 @@ define void @store_test8(i32 %n, i32 %i)
}
; CHECK-LABEL: store_test9:
-; CHECK-NEXT: param i32{{$}}
+; CHECK-NEXT: .functype store_test9 (i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}}
; CHECK-NEXT: i32.store g-40($pop0), $0{{$}}
; CHECK-NEXT: return{{$}}
@@ -487,7 +466,7 @@ define void @store_test9(i32 %i) {
}
; CHECK-LABEL: store_test10:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test10 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
; CHECK-NEXT: i32.const $push2=, g-40{{$}}
@@ -502,7 +481,7 @@ define void @store_test10(i32 %n, i32 %i
}
; CHECK-LABEL: store_test11:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test11 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store 40($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_test11(i32* %p, i32 %i) {
@@ -512,7 +491,7 @@ define void @store_test11(i32* %p, i32 %
}
; CHECK-LABEL: store_test11_noinbounds:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test11_noinbounds (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 40{{$}}
; CHECK-NEXT: i32.add $push1=, $0, $pop0{{$}}
; CHECK-NEXT: i32.store 0($pop1), $1{{$}}
@@ -524,7 +503,7 @@ define void @store_test11_noinbounds(i32
}
; CHECK-LABEL: store_test12:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test12 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -540,7 +519,7 @@ define void @store_test12(i32* %p, i32 %
}
; CHECK-LABEL: store_test13:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test13 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -556,7 +535,7 @@ define void @store_test13(i32* %p, i32 %
}
; CHECK-LABEL: store_test14:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test14 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -570,7 +549,7 @@ define void @store_test14(i32* %p, i32 %
}
; CHECK-LABEL: store_test15:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test15 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -586,7 +565,7 @@ define void @store_test15(i32* %p, i32 %
}
; CHECK-LABEL: store_test16:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test16 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -602,7 +581,7 @@ define void @store_test16(i32* %p, i32 %
}
; CHECK-LABEL: store_test17:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test17 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -618,7 +597,7 @@ define void @store_test17(i32* %p, i32 %
}
; CHECK-LABEL: store_test18:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test18 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -632,7 +611,7 @@ define void @store_test18(i32* %p, i32 %
}
; CHECK-LABEL: store_test19:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test19 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
@@ -648,7 +627,7 @@ define void @store_test19(i32* %p, i32 %
}
; CHECK-LABEL: store_test20:
-; CHECK-NEXT: param i32, i32{{$}}
+; CHECK-NEXT: .functype store_test20 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, -40{{$}}
; CHECK-NEXT: i32.add $push1=, $0, $pop0{{$}}
; CHECK-NEXT: i32.store 0($pop1), $1{{$}}
@@ -660,7 +639,7 @@ define void @store_test20(i32* %p, i32 %
}
; CHECK-LABEL: store_test21:
-; CHECK-NEXT: param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype store_test21 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}}
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/atomic-mem-consistency.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/atomic-mem-consistency.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/atomic-mem-consistency.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/atomic-mem-consistency.ll Mon Nov 19 09:10:36 2018
@@ -53,7 +53,7 @@ define i32 @load_i32_seq_cst(i32 *%p) {
; The 'acquire' and 'acq_rel' orderings arenât valid on store instructions.
; CHECK-LABEL: store_i32_unordered:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype store_i32_unordered (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_i32_unordered(i32 *%p, i32 %v) {
@@ -62,7 +62,7 @@ define void @store_i32_unordered(i32 *%p
}
; CHECK-LABEL: store_i32_monotonic:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype store_i32_monotonic (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_i32_monotonic(i32 *%p, i32 %v) {
@@ -71,7 +71,7 @@ define void @store_i32_monotonic(i32 *%p
}
; CHECK-LABEL: store_i32_release:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype store_i32_release (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_i32_release(i32 *%p, i32 %v) {
@@ -80,7 +80,7 @@ define void @store_i32_release(i32 *%p,
}
; CHECK-LABEL: store_i32_seq_cst:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype store_i32_seq_cst (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_i32_seq_cst(i32 *%p, i32 %v) {
@@ -96,7 +96,7 @@ define void @store_i32_seq_cst(i32 *%p,
; The 'unordered' ordering is not valid on atomicrmw instructions.
; CHECK-LABEL: add_i32_monotonic:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_i32_monotonic (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @add_i32_monotonic(i32* %p, i32 %v) {
@@ -105,7 +105,7 @@ define i32 @add_i32_monotonic(i32* %p, i
}
; CHECK-LABEL: add_i32_acquire:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_i32_acquire (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @add_i32_acquire(i32* %p, i32 %v) {
@@ -114,7 +114,7 @@ define i32 @add_i32_acquire(i32* %p, i32
}
; CHECK-LABEL: add_i32_release:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_i32_release (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @add_i32_release(i32* %p, i32 %v) {
@@ -123,7 +123,7 @@ define i32 @add_i32_release(i32* %p, i32
}
; CHECK-LABEL: add_i32_acq_rel:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_i32_acq_rel (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @add_i32_acq_rel(i32* %p, i32 %v) {
@@ -132,7 +132,7 @@ define i32 @add_i32_acq_rel(i32* %p, i32
}
; CHECK-LABEL: add_i32_seq_cst:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_i32_seq_cst (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @add_i32_seq_cst(i32* %p, i32 %v) {
@@ -147,7 +147,7 @@ define i32 @add_i32_seq_cst(i32* %p, i32
; that on success, and the failure ordering cannot be either release or acq_rel.
; CHECK-LABEL: cmpxchg_i32_monotonic_monotonic:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_monotonic_monotonic (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_monotonic_monotonic(i32* %p, i32 %exp, i32 %new) {
@@ -157,7 +157,7 @@ define i32 @cmpxchg_i32_monotonic_monoto
}
; CHECK-LABEL: cmpxchg_i32_acquire_monotonic:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_acquire_monotonic (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_acquire_monotonic(i32* %p, i32 %exp, i32 %new) {
@@ -167,7 +167,7 @@ define i32 @cmpxchg_i32_acquire_monotoni
}
; CHECK-LABEL: cmpxchg_i32_release_monotonic:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_release_monotonic (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_release_monotonic(i32* %p, i32 %exp, i32 %new) {
@@ -177,7 +177,7 @@ define i32 @cmpxchg_i32_release_monotoni
}
; CHECK-LABEL: cmpxchg_i32_acq_rel_monotonic:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_acq_rel_monotonic (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_acq_rel_monotonic(i32* %p, i32 %exp, i32 %new) {
@@ -187,7 +187,7 @@ define i32 @cmpxchg_i32_acq_rel_monotoni
}
; CHECK-LABEL: cmpxchg_i32_seq_cst_monotonic:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_seq_cst_monotonic (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_seq_cst_monotonic(i32* %p, i32 %exp, i32 %new) {
@@ -197,7 +197,7 @@ define i32 @cmpxchg_i32_seq_cst_monotoni
}
; CHECK-LABEL: cmpxchg_i32_acquire_acquire:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_acquire_acquire (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_acquire_acquire(i32* %p, i32 %exp, i32 %new) {
@@ -207,7 +207,7 @@ define i32 @cmpxchg_i32_acquire_acquire(
}
; CHECK-LABEL: cmpxchg_i32_release_acquire:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_release_acquire (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_release_acquire(i32* %p, i32 %exp, i32 %new) {
@@ -217,7 +217,7 @@ define i32 @cmpxchg_i32_release_acquire(
}
; CHECK-LABEL: cmpxchg_i32_acq_rel_acquire:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_acq_rel_acquire (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_acq_rel_acquire(i32* %p, i32 %exp, i32 %new) {
@@ -227,7 +227,7 @@ define i32 @cmpxchg_i32_acq_rel_acquire(
}
; CHECK-LABEL: cmpxchg_i32_seq_cst_acquire:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_seq_cst_acquire (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_seq_cst_acquire(i32* %p, i32 %exp, i32 %new) {
@@ -237,7 +237,7 @@ define i32 @cmpxchg_i32_seq_cst_acquire(
}
; CHECK-LABEL: cmpxchg_i32_seq_cst_seq_cst:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_seq_cst_seq_cst (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_seq_cst_seq_cst(i32* %p, i32 %exp, i32 %new) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/atomic-rmw.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/atomic-rmw.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/atomic-rmw.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/atomic-rmw.ll Mon Nov 19 09:10:36 2018
@@ -11,7 +11,7 @@ target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
; CHECK-LABEL: add_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @add_i32(i32* %p, i32 %v) {
@@ -20,7 +20,7 @@ define i32 @add_i32(i32* %p, i32 %v) {
}
; CHECK-LABEL: sub_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sub_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @sub_i32(i32* %p, i32 %v) {
@@ -29,7 +29,7 @@ define i32 @sub_i32(i32* %p, i32 %v) {
}
; CHECK-LABEL: and_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype and_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @and_i32(i32* %p, i32 %v) {
@@ -38,7 +38,7 @@ define i32 @and_i32(i32* %p, i32 %v) {
}
; CHECK-LABEL: or_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype or_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @or_i32(i32* %p, i32 %v) {
@@ -47,7 +47,7 @@ define i32 @or_i32(i32* %p, i32 %v) {
}
; CHECK-LABEL: xor_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xor_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @xor_i32(i32* %p, i32 %v) {
@@ -56,7 +56,7 @@ define i32 @xor_i32(i32* %p, i32 %v) {
}
; CHECK-LABEL: xchg_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xchg_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @xchg_i32(i32* %p, i32 %v) {
@@ -65,7 +65,7 @@ define i32 @xchg_i32(i32* %p, i32 %v) {
}
; CHECK-LABEL: cmpxchg_i32_loaded_value:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_loaded_value (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_loaded_value(i32* %p, i32 %exp, i32 %new) {
@@ -75,7 +75,7 @@ define i32 @cmpxchg_i32_loaded_value(i32
}
; CHECK-LABEL: cmpxchg_i32_success:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_success (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: i32.eq $push1=, $pop0, $1{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -142,7 +142,7 @@ define i32 @umin_i32(i32* %p, i32 %v) {
;===----------------------------------------------------------------------------
; CHECK-LABEL: add_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype add_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @add_i64(i64* %p, i64 %v) {
@@ -151,7 +151,7 @@ define i64 @add_i64(i64* %p, i64 %v) {
}
; CHECK-LABEL: sub_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sub_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @sub_i64(i64* %p, i64 %v) {
@@ -160,7 +160,7 @@ define i64 @sub_i64(i64* %p, i64 %v) {
}
; CHECK-LABEL: and_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype and_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @and_i64(i64* %p, i64 %v) {
@@ -169,7 +169,7 @@ define i64 @and_i64(i64* %p, i64 %v) {
}
; CHECK-LABEL: or_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype or_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @or_i64(i64* %p, i64 %v) {
@@ -178,7 +178,7 @@ define i64 @or_i64(i64* %p, i64 %v) {
}
; CHECK-LABEL: xor_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xor_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @xor_i64(i64* %p, i64 %v) {
@@ -187,7 +187,7 @@ define i64 @xor_i64(i64* %p, i64 %v) {
}
; CHECK-LABEL: xchg_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xchg_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @xchg_i64(i64* %p, i64 %v) {
@@ -196,7 +196,7 @@ define i64 @xchg_i64(i64* %p, i64 %v) {
}
; CHECK-LABEL: cmpxchg_i64_loaded_value:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_i64_loaded_value (i32, i64, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @cmpxchg_i64_loaded_value(i64* %p, i64 %exp, i64 %new) {
@@ -206,7 +206,7 @@ define i64 @cmpxchg_i64_loaded_value(i64
}
; CHECK-LABEL: cmpxchg_i64_success:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_i64_success (i32, i64, i64) -> (i32){{$}}
; CHECK: i64.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: i64.eq $push1=, $pop0, $1{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -275,7 +275,7 @@ define i64 @umin_i64(i64* %p, i64 %v) {
; add
; CHECK-LABEL: add_sext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_sext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -287,7 +287,7 @@ define i32 @add_sext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: add_sext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_sext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -299,7 +299,7 @@ define i32 @add_sext_i16_i32(i16* %p, i3
}
; CHECK-LABEL: add_sext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype add_sext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -311,7 +311,7 @@ define i64 @add_sext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: add_sext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype add_sext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -324,7 +324,7 @@ define i64 @add_sext_i16_i64(i16* %p, i6
; 32->64 sext rmw gets selected as i32.atomic.rmw.add, i64_extend_s/i32
; CHECK-LABEL: add_sext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype add_sext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i32.wrap/i64 $push0=, $1{{$}}
; CHECK: i32.atomic.rmw.add $push1=, 0($0), $pop0{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
@@ -339,7 +339,7 @@ define i64 @add_sext_i32_i64(i32* %p, i6
; sub
; CHECK-LABEL: sub_sext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sub_sext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -351,7 +351,7 @@ define i32 @sub_sext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: sub_sext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sub_sext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -363,7 +363,7 @@ define i32 @sub_sext_i16_i32(i16* %p, i3
}
; CHECK-LABEL: sub_sext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sub_sext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -375,7 +375,7 @@ define i64 @sub_sext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: sub_sext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sub_sext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -388,7 +388,7 @@ define i64 @sub_sext_i16_i64(i16* %p, i6
; 32->64 sext rmw gets selected as i32.atomic.rmw.sub, i64_extend_s/i32
; CHECK-LABEL: sub_sext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sub_sext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i32.wrap/i64 $push0=, $1
; CHECK: i32.atomic.rmw.sub $push1=, 0($0), $pop0{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
@@ -403,7 +403,7 @@ define i64 @sub_sext_i32_i64(i32* %p, i6
; and
; CHECK-LABEL: and_sext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype and_sext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -415,7 +415,7 @@ define i32 @and_sext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: and_sext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype and_sext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -427,7 +427,7 @@ define i32 @and_sext_i16_i32(i16* %p, i3
}
; CHECK-LABEL: and_sext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype and_sext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -439,7 +439,7 @@ define i64 @and_sext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: and_sext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype and_sext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -452,7 +452,7 @@ define i64 @and_sext_i16_i64(i16* %p, i6
; 32->64 sext rmw gets selected as i32.atomic.rmw.and, i64_extend_s/i32
; CHECK-LABEL: and_sext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype and_sext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i32.wrap/i64 $push0=, $1{{$}}
; CHECK: i32.atomic.rmw.and $push1=, 0($0), $pop0{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
@@ -467,7 +467,7 @@ define i64 @and_sext_i32_i64(i32* %p, i6
; or
; CHECK-LABEL: or_sext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype or_sext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -479,7 +479,7 @@ define i32 @or_sext_i8_i32(i8* %p, i32 %
}
; CHECK-LABEL: or_sext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype or_sext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -491,7 +491,7 @@ define i32 @or_sext_i16_i32(i16* %p, i32
}
; CHECK-LABEL: or_sext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype or_sext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -503,7 +503,7 @@ define i64 @or_sext_i8_i64(i8* %p, i64 %
}
; CHECK-LABEL: or_sext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype or_sext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -516,7 +516,7 @@ define i64 @or_sext_i16_i64(i16* %p, i64
; 32->64 sext rmw gets selected as i32.atomic.rmw.or, i64_extend_s/i32
; CHECK-LABEL: or_sext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype or_sext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i32.wrap/i64 $push0=, $1{{$}}
; CHECK: i32.atomic.rmw.or $push1=, 0($0), $pop0{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
@@ -531,7 +531,7 @@ define i64 @or_sext_i32_i64(i32* %p, i64
; xor
; CHECK-LABEL: xor_sext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xor_sext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -543,7 +543,7 @@ define i32 @xor_sext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: xor_sext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xor_sext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -555,7 +555,7 @@ define i32 @xor_sext_i16_i32(i16* %p, i3
}
; CHECK-LABEL: xor_sext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xor_sext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -567,7 +567,7 @@ define i64 @xor_sext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: xor_sext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xor_sext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -580,7 +580,7 @@ define i64 @xor_sext_i16_i64(i16* %p, i6
; 32->64 sext rmw gets selected as i32.atomic.rmw.xor, i64_extend_s/i32
; CHECK-LABEL: xor_sext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xor_sext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i32.wrap/i64 $push0=, $1{{$}}
; CHECK: i32.atomic.rmw.xor $push1=, 0($0), $pop0{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
@@ -595,7 +595,7 @@ define i64 @xor_sext_i32_i64(i32* %p, i6
; xchg
; CHECK-LABEL: xchg_sext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xchg_sext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -607,7 +607,7 @@ define i32 @xchg_sext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: xchg_sext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xchg_sext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -619,7 +619,7 @@ define i32 @xchg_sext_i16_i32(i16* %p, i
}
; CHECK-LABEL: xchg_sext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xchg_sext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -631,7 +631,7 @@ define i64 @xchg_sext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: xchg_sext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xchg_sext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -644,7 +644,7 @@ define i64 @xchg_sext_i16_i64(i16* %p, i
; 32->64 sext rmw gets selected as i32.atomic.rmw.xchg, i64_extend_s/i32
; CHECK-LABEL: xchg_sext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xchg_sext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i32.wrap/i64 $push0=, $1{{$}}
; CHECK: i32.atomic.rmw.xchg $push1=, 0($0), $pop0{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
@@ -659,7 +659,7 @@ define i64 @xchg_sext_i32_i64(i32* %p, i
; cmpxchg
; CHECK-LABEL: cmpxchg_sext_i8_i32:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_sext_i8_i32 (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -673,7 +673,7 @@ define i32 @cmpxchg_sext_i8_i32(i8* %p,
}
; CHECK-LABEL: cmpxchg_sext_i16_i32:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_sext_i16_i32 (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -687,7 +687,7 @@ define i32 @cmpxchg_sext_i16_i32(i16* %p
}
; CHECK-LABEL: cmpxchg_sext_i8_i64:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_sext_i8_i64 (i32, i64, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -701,7 +701,7 @@ define i64 @cmpxchg_sext_i8_i64(i8* %p,
}
; CHECK-LABEL: cmpxchg_sext_i16_i64:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_sext_i16_i64 (i32, i64, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
; CHECK-NEXT: return $pop1{{$}}
@@ -716,7 +716,7 @@ define i64 @cmpxchg_sext_i16_i64(i16* %p
; 32->64 sext rmw gets selected as i32.atomic.rmw.cmpxchg, i64_extend_s/i32
; CHECK-LABEL: cmpxchg_sext_i32_i64:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_sext_i32_i64 (i32, i64, i64) -> (i64){{$}}
; CHECK: i32.wrap/i64 $push1=, $1{{$}}
; CHECK-NEXT: i32.wrap/i64 $push0=, $2{{$}}
; CHECK-NEXT: i32.atomic.rmw.cmpxchg $push2=, 0($0), $pop1, $pop0{{$}}
@@ -737,7 +737,7 @@ define i64 @cmpxchg_sext_i32_i64(i32* %p
; nand
; CHECK-LABEL: nand_sext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype nand_sext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw8_u.cmpxchg
; CHECK: i32.extend8_s
@@ -749,7 +749,7 @@ define i32 @nand_sext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: nand_sext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype nand_sext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw16_u.cmpxchg
; CHECK: i32.extend16_s
@@ -762,7 +762,7 @@ define i32 @nand_sext_i16_i32(i16* %p, i
; FIXME Currently this cannot make use of i64.atomic.rmw8_u.cmpxchg
; CHECK-LABEL: nand_sext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype nand_sext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw8_u.cmpxchg
; CHECK: i64.extend_u/i32
@@ -776,7 +776,7 @@ define i64 @nand_sext_i8_i64(i8* %p, i64
; FIXME Currently this cannot make use of i64.atomic.rmw16_u.cmpxchg
; CHECK-LABEL: nand_sext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype nand_sext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw16_u.cmpxchg
; CHECK: i64.extend_u/i32
@@ -790,7 +790,7 @@ define i64 @nand_sext_i16_i64(i16* %p, i
; 32->64 sext rmw gets selected as i32.atomic.rmw.nand, i64_extend_s/i32
; CHECK-LABEL: nand_sext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype nand_sext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw.cmpxchg
; CHECK: i64.extend_s/i32
@@ -808,7 +808,7 @@ define i64 @nand_sext_i32_i64(i32* %p, i
; add
; CHECK-LABEL: add_zext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_zext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @add_zext_i8_i32(i8* %p, i32 %v) {
@@ -819,7 +819,7 @@ define i32 @add_zext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: add_zext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype add_zext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @add_zext_i16_i32(i16* %p, i32 %v) {
@@ -830,7 +830,7 @@ define i32 @add_zext_i16_i32(i16* %p, i3
}
; CHECK-LABEL: add_zext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype add_zext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @add_zext_i8_i64(i8* %p, i64 %v) {
@@ -841,7 +841,7 @@ define i64 @add_zext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: add_zext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype add_zext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @add_zext_i16_i64(i16* %p, i64 %v) {
@@ -852,7 +852,7 @@ define i64 @add_zext_i16_i64(i16* %p, i6
}
; CHECK-LABEL: add_zext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype add_zext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw32_u.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @add_zext_i32_i64(i32* %p, i64 %v) {
@@ -865,7 +865,7 @@ define i64 @add_zext_i32_i64(i32* %p, i6
; sub
; CHECK-LABEL: sub_zext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sub_zext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @sub_zext_i8_i32(i8* %p, i32 %v) {
@@ -876,7 +876,7 @@ define i32 @sub_zext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: sub_zext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sub_zext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @sub_zext_i16_i32(i16* %p, i32 %v) {
@@ -887,7 +887,7 @@ define i32 @sub_zext_i16_i32(i16* %p, i3
}
; CHECK-LABEL: sub_zext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sub_zext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @sub_zext_i8_i64(i8* %p, i64 %v) {
@@ -898,7 +898,7 @@ define i64 @sub_zext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: sub_zext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sub_zext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @sub_zext_i16_i64(i16* %p, i64 %v) {
@@ -909,7 +909,7 @@ define i64 @sub_zext_i16_i64(i16* %p, i6
}
; CHECK-LABEL: sub_zext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sub_zext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw32_u.sub $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @sub_zext_i32_i64(i32* %p, i64 %v) {
@@ -922,7 +922,7 @@ define i64 @sub_zext_i32_i64(i32* %p, i6
; and
; CHECK-LABEL: and_zext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype and_zext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @and_zext_i8_i32(i8* %p, i32 %v) {
@@ -933,7 +933,7 @@ define i32 @and_zext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: and_zext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype and_zext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @and_zext_i16_i32(i16* %p, i32 %v) {
@@ -944,7 +944,7 @@ define i32 @and_zext_i16_i32(i16* %p, i3
}
; CHECK-LABEL: and_zext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype and_zext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @and_zext_i8_i64(i8* %p, i64 %v) {
@@ -955,7 +955,7 @@ define i64 @and_zext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: and_zext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype and_zext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @and_zext_i16_i64(i16* %p, i64 %v) {
@@ -966,7 +966,7 @@ define i64 @and_zext_i16_i64(i16* %p, i6
}
; CHECK-LABEL: and_zext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype and_zext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw32_u.and $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @and_zext_i32_i64(i32* %p, i64 %v) {
@@ -979,7 +979,7 @@ define i64 @and_zext_i32_i64(i32* %p, i6
; or
; CHECK-LABEL: or_zext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype or_zext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @or_zext_i8_i32(i8* %p, i32 %v) {
@@ -990,7 +990,7 @@ define i32 @or_zext_i8_i32(i8* %p, i32 %
}
; CHECK-LABEL: or_zext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype or_zext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @or_zext_i16_i32(i16* %p, i32 %v) {
@@ -1001,7 +1001,7 @@ define i32 @or_zext_i16_i32(i16* %p, i32
}
; CHECK-LABEL: or_zext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype or_zext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @or_zext_i8_i64(i8* %p, i64 %v) {
@@ -1012,7 +1012,7 @@ define i64 @or_zext_i8_i64(i8* %p, i64 %
}
; CHECK-LABEL: or_zext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype or_zext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @or_zext_i16_i64(i16* %p, i64 %v) {
@@ -1023,7 +1023,7 @@ define i64 @or_zext_i16_i64(i16* %p, i64
}
; CHECK-LABEL: or_zext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype or_zext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw32_u.or $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @or_zext_i32_i64(i32* %p, i64 %v) {
@@ -1036,7 +1036,7 @@ define i64 @or_zext_i32_i64(i32* %p, i64
; xor
; CHECK-LABEL: xor_zext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xor_zext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @xor_zext_i8_i32(i8* %p, i32 %v) {
@@ -1047,7 +1047,7 @@ define i32 @xor_zext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: xor_zext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xor_zext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @xor_zext_i16_i32(i16* %p, i32 %v) {
@@ -1058,7 +1058,7 @@ define i32 @xor_zext_i16_i32(i16* %p, i3
}
; CHECK-LABEL: xor_zext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xor_zext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @xor_zext_i8_i64(i8* %p, i64 %v) {
@@ -1069,7 +1069,7 @@ define i64 @xor_zext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: xor_zext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xor_zext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @xor_zext_i16_i64(i16* %p, i64 %v) {
@@ -1080,7 +1080,7 @@ define i64 @xor_zext_i16_i64(i16* %p, i6
}
; CHECK-LABEL: xor_zext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xor_zext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw32_u.xor $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @xor_zext_i32_i64(i32* %p, i64 %v) {
@@ -1093,7 +1093,7 @@ define i64 @xor_zext_i32_i64(i32* %p, i6
; xchg
; CHECK-LABEL: xchg_zext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xchg_zext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @xchg_zext_i8_i32(i8* %p, i32 %v) {
@@ -1104,7 +1104,7 @@ define i32 @xchg_zext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: xchg_zext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype xchg_zext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @xchg_zext_i16_i32(i16* %p, i32 %v) {
@@ -1115,7 +1115,7 @@ define i32 @xchg_zext_i16_i32(i16* %p, i
}
; CHECK-LABEL: xchg_zext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xchg_zext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @xchg_zext_i8_i64(i8* %p, i64 %v) {
@@ -1126,7 +1126,7 @@ define i64 @xchg_zext_i8_i64(i8* %p, i64
}
; CHECK-LABEL: xchg_zext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xchg_zext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @xchg_zext_i16_i64(i16* %p, i64 %v) {
@@ -1137,7 +1137,7 @@ define i64 @xchg_zext_i16_i64(i16* %p, i
}
; CHECK-LABEL: xchg_zext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype xchg_zext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw32_u.xchg $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @xchg_zext_i32_i64(i32* %p, i64 %v) {
@@ -1150,7 +1150,7 @@ define i64 @xchg_zext_i32_i64(i32* %p, i
; cmpxchg
; CHECK-LABEL: cmpxchg_zext_i8_i32:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_zext_i8_i32 (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw8_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_zext_i8_i32(i8* %p, i32 %exp, i32 %new) {
@@ -1163,7 +1163,7 @@ define i32 @cmpxchg_zext_i8_i32(i8* %p,
}
; CHECK-LABEL: cmpxchg_zext_i16_i32:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_zext_i16_i32 (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw16_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_zext_i16_i32(i16* %p, i32 %exp, i32 %new) {
@@ -1176,7 +1176,7 @@ define i32 @cmpxchg_zext_i16_i32(i16* %p
}
; CHECK-LABEL: cmpxchg_zext_i8_i64:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_zext_i8_i64 (i32, i64, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw8_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @cmpxchg_zext_i8_i64(i8* %p, i64 %exp, i64 %new) {
@@ -1189,7 +1189,7 @@ define i64 @cmpxchg_zext_i8_i64(i8* %p,
}
; CHECK-LABEL: cmpxchg_zext_i16_i64:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_zext_i16_i64 (i32, i64, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw16_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @cmpxchg_zext_i16_i64(i16* %p, i64 %exp, i64 %new) {
@@ -1202,7 +1202,7 @@ define i64 @cmpxchg_zext_i16_i64(i16* %p
}
; CHECK-LABEL: cmpxchg_zext_i32_i64:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_zext_i32_i64 (i32, i64, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw32_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @cmpxchg_zext_i32_i64(i32* %p, i64 %exp, i64 %new) {
@@ -1220,7 +1220,7 @@ define i64 @cmpxchg_zext_i32_i64(i32* %p
; nand
; CHECK-LABEL: nand_zext_i8_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype nand_zext_i8_i32 (i32, i32) -> (i32){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw8_u.cmpxchg
define i32 @nand_zext_i8_i32(i8* %p, i32 %v) {
@@ -1231,7 +1231,7 @@ define i32 @nand_zext_i8_i32(i8* %p, i32
}
; CHECK-LABEL: nand_zext_i16_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype nand_zext_i16_i32 (i32, i32) -> (i32){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw16_u.cmpxchg
define i32 @nand_zext_i16_i32(i16* %p, i32 %v) {
@@ -1243,7 +1243,7 @@ define i32 @nand_zext_i16_i32(i16* %p, i
; FIXME Currently this cannot make use of i64.atomic.rmw8_u.cmpxchg
; CHECK-LABEL: nand_zext_i8_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype nand_zext_i8_i64 (i32, i64) -> (i64){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw8_u.cmpxchg
; CHECK: i64.extend_u/i32
@@ -1256,7 +1256,7 @@ define i64 @nand_zext_i8_i64(i8* %p, i64
; FIXME Currently this cannot make use of i64.atomic.rmw16_u.cmpxchg
; CHECK-LABEL: nand_zext_i16_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype nand_zext_i16_i64 (i32, i64) -> (i64){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw16_u.cmpxchg
; CHECK: i64.extend_u/i32
@@ -1269,7 +1269,7 @@ define i64 @nand_zext_i16_i64(i16* %p, i
; FIXME Currently this cannot make use of i64.atomic.rmw32_u.cmpxchg
; CHECK-LABEL: nand_zext_i32_i64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype nand_zext_i32_i64 (i32, i64) -> (i64){{$}}
; CHECK: loop
; CHECK: i32.atomic.rmw.cmpxchg
; CHECK: i64.extend_u/i32
Modified: llvm/trunk/test/CodeGen/WebAssembly/byval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/byval.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/byval.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/byval.ll Mon Nov 19 09:10:36 2018
@@ -19,7 +19,7 @@ declare void @ext_byval_func_empty(%Empt
; CHECK-LABEL: byval_arg
define void @byval_arg(%SmallStruct* %ptr) {
- ; CHECK: .param i32
+ ; CHECK: .functype byval_arg (i32) -> ()
; Subtract 16 from SP (SP is 16-byte aligned)
; CHECK-NEXT: get_global $push[[L2:.+]]=, __stack_pointer at GLOBAL
; CHECK-NEXT: i32.const $push[[L3:.+]]=, 16
@@ -45,7 +45,7 @@ define void @byval_arg(%SmallStruct* %pt
; CHECK-LABEL: byval_arg_align8
define void @byval_arg_align8(%SmallStruct* %ptr) {
- ; CHECK: .param i32
+ ; CHECK: .functype byval_arg_align8 (i32) -> ()
; Don't check the entire SP sequence, just enough to get the alignment.
; CHECK: i32.const $push[[L1:.+]]=, 16
; CHECK-NEXT: i32.sub $push[[L11:.+]]=, {{.+}}, $pop[[L1]]
@@ -64,7 +64,7 @@ define void @byval_arg_align8(%SmallStru
; CHECK-LABEL: byval_arg_double
define void @byval_arg_double(%AlignedStruct* %ptr) {
- ; CHECK: .param i32
+ ; CHECK: .functype byval_arg_double (i32) -> ()
; Subtract 16 from SP (SP is 16-byte aligned)
; CHECK: i32.const $push[[L1:.+]]=, 16
; CHECK-NEXT: i32.sub $push[[L14:.+]]=, {{.+}}, $pop[[L1]]
@@ -82,7 +82,7 @@ define void @byval_arg_double(%AlignedSt
; CHECK-LABEL: byval_param
define void @byval_param(%SmallStruct* byval align 32 %ptr) {
- ; CHECK: .param i32
+ ; CHECK: .functype byval_param (i32) -> ()
; %ptr is just a pointer to a struct, so pass it directly through
; CHECK: call ext_func at FUNCTION, $0
call void @ext_func(%SmallStruct* %ptr)
@@ -91,7 +91,7 @@ define void @byval_param(%SmallStruct* b
; CHECK-LABEL: byval_empty_caller
define void @byval_empty_caller(%EmptyStruct* %ptr) {
- ; CHECK: .param i32
+ ; CHECK: .functype byval_empty_caller (i32) -> ()
; CHECK: call ext_byval_func_empty at FUNCTION, $0
call void @ext_byval_func_empty(%EmptyStruct* byval %ptr)
ret void
@@ -99,7 +99,7 @@ define void @byval_empty_caller(%EmptySt
; CHECK-LABEL: byval_empty_callee
define void @byval_empty_callee(%EmptyStruct* byval %ptr) {
- ; CHECK: .param i32
+ ; CHECK: .functype byval_empty_callee (i32) -> ()
; CHECK: call ext_func_empty at FUNCTION, $0
call void @ext_func_empty(%EmptyStruct* %ptr)
ret void
Modified: llvm/trunk/test/CodeGen/WebAssembly/call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/call.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/call.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/call.ll Mon Nov 19 09:10:36 2018
@@ -16,7 +16,7 @@ declare <16 x i8> @v128_nullary()
declare void @void_nullary()
; CHECK-LABEL: call_i32_nullary:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype call_i32_nullary () -> (i32){{$}}
; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_nullary at FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @call_i32_nullary() {
@@ -25,7 +25,7 @@ define i32 @call_i32_nullary() {
}
; CHECK-LABEL: call_i64_nullary:
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype call_i64_nullary () -> (i64){{$}}
; CHECK-NEXT: {{^}} i64.call $push[[NUM:[0-9]+]]=, i64_nullary at FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @call_i64_nullary() {
@@ -34,7 +34,7 @@ define i64 @call_i64_nullary() {
}
; CHECK-LABEL: call_float_nullary:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype call_float_nullary () -> (f32){{$}}
; CHECK-NEXT: {{^}} f32.call $push[[NUM:[0-9]+]]=, float_nullary at FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @call_float_nullary() {
@@ -43,7 +43,7 @@ define float @call_float_nullary() {
}
; CHECK-LABEL: call_double_nullary:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype call_double_nullary () -> (f64){{$}}
; CHECK-NEXT: {{^}} f64.call $push[[NUM:[0-9]+]]=, double_nullary at FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @call_double_nullary() {
@@ -52,7 +52,7 @@ define double @call_double_nullary() {
}
; CHECK-LABEL: call_v128_nullary:
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype call_v128_nullary () -> (v128){{$}}
; CHECK-NEXT: {{^}} v128.call $push[[NUM:[0-9]+]]=, v128_nullary at FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define <16 x i8> @call_v128_nullary() {
@@ -61,6 +61,7 @@ define <16 x i8> @call_v128_nullary() {
}
; CHECK-LABEL: call_void_nullary:
+; CHECK-NEXT: .functype call_void_nullary () -> (){{$}}
; CHECK-NEXT: {{^}} call void_nullary at FUNCTION{{$}}
; CHECK-NEXT: return{{$}}
define void @call_void_nullary() {
@@ -69,8 +70,7 @@ define void @call_void_nullary() {
}
; CHECK-LABEL: call_i32_unary:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype call_i32_unary (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_unary at FUNCTION, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -80,8 +80,7 @@ define i32 @call_i32_unary(i32 %a) {
}
; CHECK-LABEL: call_i32_binary:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype call_i32_binary (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_binary at FUNCTION, $pop[[L0]], $pop[[L1]]{{$}}
@@ -92,7 +91,7 @@ define i32 @call_i32_binary(i32 %a, i32
}
; CHECK-LABEL: call_indirect_void:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype call_indirect_void (i32) -> (){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: {{^}} call_indirect $pop[[L0]]{{$}}
; CHECK-NEXT: return{{$}}
@@ -102,8 +101,7 @@ define void @call_indirect_void(void ()*
}
; CHECK-LABEL: call_indirect_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype call_indirect_i32 (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: {{^}} i32.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -113,8 +111,7 @@ define i32 @call_indirect_i32(i32 ()* %c
}
; CHECK-LABEL: call_indirect_i64:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype call_indirect_i64 (i32) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: {{^}} i64.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -124,8 +121,7 @@ define i64 @call_indirect_i64(i64 ()* %c
}
; CHECK-LABEL: call_indirect_float:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype call_indirect_float (i32) -> (f32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: {{^}} f32.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -135,8 +131,7 @@ define float @call_indirect_float(float
}
; CHECK-LABEL: call_indirect_double:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype call_indirect_double (i32) -> (f64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: {{^}} f64.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -146,8 +141,7 @@ define double @call_indirect_double(doub
}
; CHECK-LABEL: call_indirect_v128:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype call_indirect_v128 (i32) -> (v128){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: {{^}} v128.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -157,7 +151,7 @@ define <16 x i8> @call_indirect_v128(<16
}
; CHECK-LABEL: call_indirect_arg:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype call_indirect_arg (i32, i32) -> (){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: {{^}} call_indirect $pop[[L0]], $pop[[L1]]{{$}}
@@ -168,7 +162,7 @@ define void @call_indirect_arg(void (i32
}
; CHECK-LABEL: call_indirect_arg_2:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype call_indirect_arg_2 (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 2{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
@@ -181,6 +175,7 @@ define void @call_indirect_arg_2(i32 (i3
}
; CHECK-LABEL: tail_call_void_nullary:
+; CHECK-NEXT: .functype tail_call_void_nullary () -> (){{$}}
; CHECK-NEXT: {{^}} call void_nullary at FUNCTION{{$}}
; CHECK-NEXT: return{{$}}
define void @tail_call_void_nullary() {
@@ -189,6 +184,7 @@ define void @tail_call_void_nullary() {
}
; CHECK-LABEL: fastcc_tail_call_void_nullary:
+; CHECK-NEXT: .functype fastcc_tail_call_void_nullary () -> (){{$}}
; CHECK-NEXT: {{^}} call void_nullary at FUNCTION{{$}}
; CHECK-NEXT: return{{$}}
define void @fastcc_tail_call_void_nullary() {
@@ -197,6 +193,7 @@ define void @fastcc_tail_call_void_nulla
}
; CHECK-LABEL: coldcc_tail_call_void_nullary:
+; CHECK-NEXT: .functype coldcc_tail_call_void_nullary () -> (){{$}}
; CHECK-NEXT: {{^}} call void_nullary at FUNCTION{{$}}
; CHECK-NEXT: return{{$}}
define void @coldcc_tail_call_void_nullary() {
@@ -205,6 +202,7 @@ define void @coldcc_tail_call_void_nulla
}
; CHECK-LABEL: call_constexpr:
+; CHECK-NEXT: .functype call_constexpr () -> (){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 2{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 3{{$}}
; CHECK-NEXT: call .Lvararg_func_bitcast at FUNCTION, $pop[[L0]], $pop[[L1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify.ll Mon Nov 19 09:10:36 2018
@@ -514,7 +514,7 @@ if.end:
; Test switch lowering and block placement.
; CHECK-LABEL: test4:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype test4 (i32) -> (){{$}}
; CHECK: block {{$}}
; CHECK-NEXT: block {{$}}
; CHECK: br_if 0, $pop{{[0-9]+}}{{$}}
@@ -532,7 +532,7 @@ if.end:
; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: return{{$}}
; OPT-LABEL: test4:
-; OPT-NEXT: .param i32{{$}}
+; OPT-NEXT: .functype test4 (i32) -> (){{$}}
; OPT: block {{$}}
; OPT-NEXT: block {{$}}
; OPT: br_if 0, $pop{{[0-9]+}}{{$}}
@@ -1146,7 +1146,7 @@ bb7:
; optnone to disable optimizations to test this case.
; CHECK-LABEL: test13:
-; CHECK-NEXT: block {{$}}
+; CHECK: block {{$}}
; CHECK-NEXT: block {{$}}
; CHECK: br_if 0, $pop0{{$}}
; CHECK: block {{$}}
@@ -1162,7 +1162,7 @@ bb7:
; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: unreachable{{$}}
; OPT-LABEL: test13:
-; OPT-NEXT: block {{$}}
+; OPT: block {{$}}
; OPT-NEXT: block {{$}}
; OPT: br_if 0, $pop0{{$}}
; OPT: block {{$}}
@@ -1198,7 +1198,7 @@ bb5:
; before the loop for the second.
; CHECK-LABEL: test14:
-; CHECK-NEXT: .LBB23_1:{{$}}
+; CHECK: .LBB23_1:{{$}}
; CHECK-NEXT: loop {{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}}
; CHECK-NEXT: br_if 0, $pop0{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/comparisons-f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/comparisons-f32.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/comparisons-f32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/comparisons-f32.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ord_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -24,8 +23,7 @@ define i32 @ord_f32(float %x, float %y)
}
; CHECK-LABEL: uno_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype uno_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -41,8 +39,7 @@ define i32 @uno_f32(float %x, float %y)
}
; CHECK-LABEL: oeq_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype oeq_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -102,8 +99,7 @@ define i32 @oge_f32(float %x, float %y)
; These simply rely on SDAG's Expand cond code action.
; CHECK-LABEL: ueq_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ueq_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -123,8 +119,7 @@ define i32 @ueq_f32(float %x, float %y)
}
; CHECK-LABEL: one_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype one_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -144,8 +139,7 @@ define i32 @one_f32(float %x, float %y)
}
; CHECK-LABEL: ult_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ult_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -159,8 +153,7 @@ define i32 @ult_f32(float %x, float %y)
}
; CHECK-LABEL: ule_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ule_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -174,8 +167,7 @@ define i32 @ule_f32(float %x, float %y)
}
; CHECK-LABEL: ugt_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ugt_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -189,8 +181,7 @@ define i32 @ugt_f32(float %x, float %y)
}
; CHECK-LABEL: uge_f32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype uge_f32 (f32, f32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/comparisons-f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/comparisons-f64.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/comparisons-f64.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/comparisons-f64.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ord_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -24,8 +23,7 @@ define i32 @ord_f64(double %x, double %y
}
; CHECK-LABEL: uno_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype uno_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -41,8 +39,7 @@ define i32 @uno_f64(double %x, double %y
}
; CHECK-LABEL: oeq_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype oeq_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -101,8 +98,7 @@ define i32 @oge_f64(double %x, double %y
; Expanded comparisons, which also check for NaN.
; CHECK-LABEL: ueq_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ueq_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -122,8 +118,7 @@ define i32 @ueq_f64(double %x, double %y
}
; CHECK-LABEL: one_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype one_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -143,8 +138,7 @@ define i32 @one_f64(double %x, double %y
}
; CHECK-LABEL: ult_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ult_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -158,8 +152,7 @@ define i32 @ult_f64(double %x, double %y
}
; CHECK-LABEL: ule_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ule_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -173,8 +166,7 @@ define i32 @ule_f64(double %x, double %y
}
; CHECK-LABEL: ugt_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ugt_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -188,8 +180,7 @@ define i32 @ugt_f64(double %x, double %y
}
; CHECK-LABEL: uge_f64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype uge_f64 (f64, f64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/comparisons-i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/comparisons-i32.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/comparisons-i32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/comparisons-i32.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype eq_i32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/comparisons-i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/comparisons-i64.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/comparisons-i64.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/comparisons-i64.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype eq_i64 (i64, i64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/conv-trap.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/conv-trap.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/conv-trap.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/conv-trap.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_trunc_s_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_s_f32 (f32) -> (i32){{$}}
; CHECK-NEXT: block
; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}}
@@ -26,8 +25,7 @@ define i32 @i32_trunc_s_f32(float %x) {
}
; CHECK-LABEL: i32_trunc_u_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_u_f32 (f32) -> (i32){{$}}
; CHECK-NEXT: block
; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p32{{$}}
; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
@@ -47,8 +45,7 @@ define i32 @i32_trunc_u_f32(float %x) {
}
; CHECK-LABEL: i32_trunc_s_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_s_f64 (f64) -> (i32){{$}}
; CHECK-NEXT: block
; CHECK-NEXT: f64.abs $push[[ABS:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}}
@@ -66,8 +63,7 @@ define i32 @i32_trunc_s_f64(double %x) {
}
; CHECK-LABEL: i32_trunc_u_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_u_f64 (f64) -> (i32){{$}}
; CHECK-NEXT: block
; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p32{{$}}
; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
@@ -87,8 +83,7 @@ define i32 @i32_trunc_u_f64(double %x) {
}
; CHECK-LABEL: i64_trunc_s_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_s_f32 (f32) -> (i64){{$}}
; CHECK-NEXT: block
; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p63{{$}}
@@ -106,8 +101,7 @@ define i64 @i64_trunc_s_f32(float %x) {
}
; CHECK-LABEL: i64_trunc_u_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_u_f32 (f32) -> (i64){{$}}
; CHECK-NEXT: block
; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p64{{$}}
; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
@@ -127,8 +121,7 @@ define i64 @i64_trunc_u_f32(float %x) {
}
; CHECK-LABEL: i64_trunc_s_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_s_f64 (f64) -> (i64){{$}}
; CHECK-NEXT: block
; CHECK-NEXT: f64.abs $push[[ABS:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p63{{$}}
@@ -146,8 +139,7 @@ define i64 @i64_trunc_s_f64(double %x) {
}
; CHECK-LABEL: i64_trunc_u_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_u_f64 (f64) -> (i64){{$}}
; CHECK-NEXT: block
; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p64{{$}}
; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/conv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/conv.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/conv.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/conv.ll Mon Nov 19 09:10:36 2018
@@ -6,8 +6,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_wrap_i64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_wrap_i64 (i64) -> (i32){{$}}
; CHECK-NEXT: i32.wrap/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @i32_wrap_i64(i64 %x) {
@@ -16,8 +15,7 @@ define i32 @i32_wrap_i64(i64 %x) {
}
; CHECK-LABEL: i64_extend_s_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_extend_s_i32 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.extend_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @i64_extend_s_i32(i32 %x) {
@@ -26,8 +24,7 @@ define i64 @i64_extend_s_i32(i32 %x) {
}
; CHECK-LABEL: i64_extend_u_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_extend_u_i32 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.extend_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @i64_extend_u_i32(i32 %x) {
@@ -36,8 +33,7 @@ define i64 @i64_extend_u_i32(i32 %x) {
}
; CHECK-LABEL: i32_trunc_s_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_s_f32 (f32) -> (i32){{$}}
; CHECK-NEXT: i32.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @i32_trunc_s_f32(float %x) {
@@ -46,8 +42,7 @@ define i32 @i32_trunc_s_f32(float %x) {
}
; CHECK-LABEL: i32_trunc_sat_s_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_sat_s_f32 (f32) -> (i32){{$}}
; CHECK-NEXT: i32.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
declare i32 @llvm.wasm.trunc.saturate.signed.i32.f32(float)
@@ -57,8 +52,7 @@ define i32 @i32_trunc_sat_s_f32(float %x
}
; CHECK-LABEL: i32_trunc_u_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_u_f32 (f32) -> (i32){{$}}
; CHECK-NEXT: i32.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @i32_trunc_u_f32(float %x) {
@@ -67,8 +61,7 @@ define i32 @i32_trunc_u_f32(float %x) {
}
; CHECK-LABEL: i32_trunc_sat_u_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_sat_u_f32 (f32) -> (i32){{$}}
; CHECK-NEXT: i32.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
declare i32 @llvm.wasm.trunc.saturate.unsigned.i32.f32(float)
@@ -78,8 +71,7 @@ define i32 @i32_trunc_sat_u_f32(float %x
}
; CHECK-LABEL: i32_trunc_s_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_s_f64 (f64) -> (i32){{$}}
; CHECK-NEXT: i32.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @i32_trunc_s_f64(double %x) {
@@ -88,8 +80,7 @@ define i32 @i32_trunc_s_f64(double %x) {
}
; CHECK-LABEL: i32_trunc_sat_s_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_sat_s_f64 (f64) -> (i32){{$}}
; CHECK-NEXT: i32.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
declare i32 @llvm.wasm.trunc.saturate.signed.i32.f64(double)
@@ -99,8 +90,7 @@ define i32 @i32_trunc_sat_s_f64(double %
}
; CHECK-LABEL: i32_trunc_u_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_u_f64 (f64) -> (i32){{$}}
; CHECK-NEXT: i32.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @i32_trunc_u_f64(double %x) {
@@ -109,8 +99,7 @@ define i32 @i32_trunc_u_f64(double %x) {
}
; CHECK-LABEL: i32_trunc_sat_u_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_trunc_sat_u_f64 (f64) -> (i32){{$}}
; CHECK-NEXT: i32.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
declare i32 @llvm.wasm.trunc.saturate.unsigned.i32.f64(double)
@@ -120,8 +109,7 @@ define i32 @i32_trunc_sat_u_f64(double %
}
; CHECK-LABEL: i64_trunc_s_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_s_f32 (f32) -> (i64){{$}}
; CHECK-NEXT: i64.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @i64_trunc_s_f32(float %x) {
@@ -130,8 +118,7 @@ define i64 @i64_trunc_s_f32(float %x) {
}
; CHECK-LABEL: i64_trunc_sat_s_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_sat_s_f32 (f32) -> (i64){{$}}
; CHECK-NEXT: i64.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
declare i64 @llvm.wasm.trunc.saturate.signed.i64.f32(float)
@@ -141,8 +128,7 @@ define i64 @i64_trunc_sat_s_f32(float %x
}
; CHECK-LABEL: i64_trunc_u_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_u_f32 (f32) -> (i64){{$}}
; CHECK-NEXT: i64.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @i64_trunc_u_f32(float %x) {
@@ -151,8 +137,7 @@ define i64 @i64_trunc_u_f32(float %x) {
}
; CHECK-LABEL: i64_trunc_sat_u_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_sat_u_f32 (f32) -> (i64){{$}}
; CHECK-NEXT: i64.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
declare i64 @llvm.wasm.trunc.saturate.unsigned.i64.f32(float)
@@ -162,8 +147,7 @@ define i64 @i64_trunc_sat_u_f32(float %x
}
; CHECK-LABEL: i64_trunc_s_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_s_f64 (f64) -> (i64){{$}}
; CHECK-NEXT: i64.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @i64_trunc_s_f64(double %x) {
@@ -172,8 +156,7 @@ define i64 @i64_trunc_s_f64(double %x) {
}
; CHECK-LABEL: i64_trunc_sat_s_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_sat_s_f64 (f64) -> (i64){{$}}
; CHECK-NEXT: i64.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
declare i64 @llvm.wasm.trunc.saturate.signed.i64.f64(double)
@@ -183,8 +166,7 @@ define i64 @i64_trunc_sat_s_f64(double %
}
; CHECK-LABEL: i64_trunc_u_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_u_f64 (f64) -> (i64){{$}}
; CHECK-NEXT: i64.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @i64_trunc_u_f64(double %x) {
@@ -193,8 +175,7 @@ define i64 @i64_trunc_u_f64(double %x) {
}
; CHECK-LABEL: i64_trunc_sat_u_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_trunc_sat_u_f64 (f64) -> (i64){{$}}
; CHECK-NEXT: i64.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
declare i64 @llvm.wasm.trunc.saturate.unsigned.i64.f64(double)
@@ -204,8 +185,7 @@ define i64 @i64_trunc_sat_u_f64(double %
}
; CHECK-LABEL: f32_convert_s_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype f32_convert_s_i32 (i32) -> (f32){{$}}
; CHECK-NEXT: f32.convert_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @f32_convert_s_i32(i32 %x) {
@@ -214,8 +194,7 @@ define float @f32_convert_s_i32(i32 %x)
}
; CHECK-LABEL: f32_convert_u_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype f32_convert_u_i32 (i32) -> (f32){{$}}
; CHECK-NEXT: f32.convert_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @f32_convert_u_i32(i32 %x) {
@@ -224,8 +203,7 @@ define float @f32_convert_u_i32(i32 %x)
}
; CHECK-LABEL: f64_convert_s_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype f64_convert_s_i32 (i32) -> (f64){{$}}
; CHECK-NEXT: f64.convert_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @f64_convert_s_i32(i32 %x) {
@@ -234,8 +212,7 @@ define double @f64_convert_s_i32(i32 %x)
}
; CHECK-LABEL: f64_convert_u_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype f64_convert_u_i32 (i32) -> (f64){{$}}
; CHECK-NEXT: f64.convert_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @f64_convert_u_i32(i32 %x) {
@@ -244,8 +221,7 @@ define double @f64_convert_u_i32(i32 %x)
}
; CHECK-LABEL: f32_convert_s_i64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype f32_convert_s_i64 (i64) -> (f32){{$}}
; CHECK-NEXT: f32.convert_s/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @f32_convert_s_i64(i64 %x) {
@@ -254,8 +230,7 @@ define float @f32_convert_s_i64(i64 %x)
}
; CHECK-LABEL: f32_convert_u_i64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype f32_convert_u_i64 (i64) -> (f32){{$}}
; CHECK-NEXT: f32.convert_u/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @f32_convert_u_i64(i64 %x) {
@@ -264,8 +239,7 @@ define float @f32_convert_u_i64(i64 %x)
}
; CHECK-LABEL: f64_convert_s_i64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype f64_convert_s_i64 (i64) -> (f64){{$}}
; CHECK-NEXT: f64.convert_s/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @f64_convert_s_i64(i64 %x) {
@@ -274,8 +248,7 @@ define double @f64_convert_s_i64(i64 %x)
}
; CHECK-LABEL: f64_convert_u_i64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype f64_convert_u_i64 (i64) -> (f64){{$}}
; CHECK-NEXT: f64.convert_u/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @f64_convert_u_i64(i64 %x) {
@@ -284,8 +257,7 @@ define double @f64_convert_u_i64(i64 %x)
}
; CHECK-LABEL: f64_promote_f32:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype f64_promote_f32 (f32) -> (f64){{$}}
; CHECK-NEXT: f64.promote/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @f64_promote_f32(float %x) {
@@ -294,8 +266,7 @@ define double @f64_promote_f32(float %x)
}
; CHECK-LABEL: f32_demote_f64:
-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype f32_demote_f64 (f64) -> (f32){{$}}
; CHECK-NEXT: f32.demote/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @f32_demote_f64(double %x) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/dead-vreg.ll Mon Nov 19 09:10:36 2018
@@ -7,7 +7,7 @@ target triple = "wasm32-unknown-unknown"
define void @foo(i32* nocapture %a, i32 %w, i32 %h) {
; CHECK-LABEL: foo:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype foo (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32{{$}}
entry:
%cmp.19 = icmp sgt i32 %h, 0
Modified: llvm/trunk/test/CodeGen/WebAssembly/f16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/f16.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/f16.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/f16.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: demote:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype demote (f32) -> (f32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.call $push[[L1:[0-9]+]]=, __gnu_f2h_ieee at FUNCTION, $pop[[L0]]{{$}}
; CHECK-NEXT: f32.call $push[[L2:[0-9]+]]=, __gnu_h2f_ieee at FUNCTION, $pop[[L1]]{{$}}
@@ -19,8 +18,7 @@ define half @demote(float %f) {
}
; CHECK-LABEL: promote:
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype promote (f32) -> (f32){{$}}
; CHECK-NEXT: get_local $push0=, 0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define float @promote(half %f) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/f32.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/f32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/f32.ll Mon Nov 19 09:10:36 2018
@@ -16,8 +16,7 @@ declare float @llvm.rint.f32(float)
declare float @llvm.fma.f32(float, float, float)
; CHECK-LABEL: fadd32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype fadd32 (f32, f32) -> (f32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.add $push[[LR:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/f64.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/f64.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/f64.ll Mon Nov 19 09:10:36 2018
@@ -16,8 +16,7 @@ declare double @llvm.rint.f64(double)
declare double @llvm.fma.f64(double, double, double)
; CHECK-LABEL: fadd64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype fadd64 (f64, f64) -> (f64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.add $push[[LR:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i24.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i24.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i24.ll Mon Nov 19 09:10:36 2018
@@ -8,8 +8,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: add:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype add (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push2=, 0{{$}}
; CHECK-NEXT: get_local $push1=, 1{{$}}
; CHECK-NEXT: i32.add $push0=, $pop2, $pop1{{$}}
@@ -20,7 +19,7 @@ define i24 @add(i24 %x, i24 %y) {
}
; CHECK-LABEL: return_zero:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype return_zero () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}}
; CHECK-NEXT: end_function
define i24 @return_zero() {
Modified: llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i256.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i256.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i256.ll Mon Nov 19 09:10:36 2018
@@ -8,7 +8,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: add:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64, i64, i64, i64, i64{{$}}
+; CHECK-NEXT: .functype add (i32, i64, i64, i64, i64, i64, i64, i64, i64) -> (){{$}}
; CHECK-NOT: .result
; CHECK: end_function
define i256 @add(i256 %x, i256 %y) {
@@ -17,16 +17,14 @@ define i256 @add(i256 %x, i256 %y) {
}
; CHECK-LABEL: return_zero:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype return_zero (i32) -> (){{$}}
; CHECK: end_function
define i256 @return_zero() {
ret i256 0
}
; CHECK-LABEL: return_zero_with_params:
-; CHECK-NEXT: .param i32, f32{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype return_zero_with_params (i32, f32) -> (){{$}}
; CHECK: end_function
define i256 @return_zero_with_params(float %x) {
ret i256 0
Modified: llvm/trunk/test/CodeGen/WebAssembly/frem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/frem.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/frem.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/frem.ll Mon Nov 19 09:10:36 2018
@@ -6,8 +6,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: frem32:
-; CHECK-NEXT: .param f32, f32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype frem32 (f32, f32) -> (f32){{$}}
; CHECK-NEXT: {{^}} f32.call $push0=, fmodf at FUNCTION, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define float @frem32(float %x, float %y) {
@@ -16,8 +15,7 @@ define float @frem32(float %x, float %y)
}
; CHECK-LABEL: frem64:
-; CHECK-NEXT: .param f64, f64{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype frem64 (f64, f64) -> (f64){{$}}
; CHECK-NEXT: {{^}} f64.call $push0=, fmod at FUNCTION, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define double @frem64(double %x, double %y) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/func.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/func.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/func.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/func.ll Mon Nov 19 09:10:36 2018
@@ -14,7 +14,7 @@ define void @f0() {
}
; CHECK-LABEL: f1:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype f1 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
; CHECK: .size f1,
@@ -23,8 +23,7 @@ define i32 @f1() {
}
; CHECK-LABEL: f2:
-; CHECK-NEXT: .param i32, f32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype f2 (i32, f32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
; CHECK: .size f2,
@@ -33,7 +32,7 @@ define i32 @f2(i32 %p1, float %p2) {
}
; CHECK-LABEL: f3:
-; CHECK-NEXT: .param i32, f32{{$}}
+; CHECK-NEXT: .functype f3 (i32, f32) -> (){{$}}
; CHECK-NOT: local
; CHECK-NEXT: return{{$}}
; CHECK: .size f3,
@@ -42,8 +41,7 @@ define void @f3(i32 %p1, float %p2) {
}
; CHECK-LABEL: f4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype f4 (i32) -> (i32){{$}}
; CHECK-NOT: local
; CHECK: .size f4,
define i32 @f4(i32 %x) {
@@ -57,7 +55,7 @@ false:
}
; CHECK-LABEL: f5:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype f5 () -> (f32){{$}}
; CHECK-NEXT: unreachable
define float @f5() {
unreachable
Modified: llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll Mon Nov 19 09:10:36 2018
@@ -23,9 +23,9 @@ declare void @specified(i32, i32)
; CHECK: call .Lspecified_bitcast at FUNCTION, $pop{{[0-9]+$}}
; CHECK: .Lunderspecified_bitcast:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype .Lunderspecified_bitcast (i32, i32) -> (){{$}}
; CHECK: call underspecified at FUNCTION, $pop{{[0-9]+$}}
; CHECK: .Lspecified_bitcast:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype .Lspecified_bitcast (i32) -> (){{$}}
; CHECK: call specified at FUNCTION, $pop{{[0-9]+}}, $pop{{[0-9]+$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts.ll Mon Nov 19 09:10:36 2018
@@ -17,7 +17,7 @@ declare void @foo2()
declare void @foo3()
; CHECK-LABEL: test:
-; CHECK-NEXT: call .Lhas_i32_arg_bitcast.2 at FUNCTION{{$}}
+; CHECK: call .Lhas_i32_arg_bitcast.2 at FUNCTION{{$}}
; CHECK-NEXT: call .Lhas_i32_arg_bitcast.2 at FUNCTION{{$}}
; CHECK-NEXT: call .Lhas_i32_ret_bitcast at FUNCTION{{$}}
; CHECK-NEXT: i32.call $drop=, has_i32_ret at FUNCTION
@@ -96,7 +96,7 @@ define void @test_varargs() {
@global_func = hidden local_unnamed_addr global void ()* null
; CHECK-LABEL: test_store:
-; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, has_i32_ret at FUNCTION{{$}}
; CHECK-NEXT: i32.store global_func($pop[[L0]]), $pop[[L1]]{{$}}
define void @test_store() {
@@ -106,7 +106,7 @@ define void @test_store() {
}
; CHECK-LABEL: test_load:
-; CHECK-NEXT: result i32{{$}}
+; CHECK-NEXT: .functype test_load () -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.load $push[[L1:[0-9]+]]=, global_func($pop[[L0]]){{$}}
; CHECK-NEXT: i32.call_indirect $push{{[0-9]+}}=, $pop[[L1]]{{$}}
@@ -121,7 +121,7 @@ define i32 @test_load() {
declare void @call_func(i32 ()*)
; CHECK-LABEL: test_argument:
-; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, has_i32_ret at FUNCTION{{$}}
+; CHECK: i32.const $push[[L0:[0-9]+]]=, has_i32_ret at FUNCTION{{$}}
; CHECK-NEXT: call call_func at FUNCTION, $pop[[L0]]{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, has_i32_arg at FUNCTION{{$}}
; CHECK-NEXT: call call_func at FUNCTION, $pop[[L1]]{{$}}
@@ -166,21 +166,21 @@ end:
}
; CHECK-LABEL: .Lhas_i32_arg_bitcast:
-; CHECK-NEXT: .param i32, i32
+; CHECK-NEXT: .functype .Lhas_i32_arg_bitcast (i32, i32) -> ()
; CHECK-NEXT: call has_i32_arg at FUNCTION, $1{{$}}
; CHECK-NEXT: end_function
; CHECK-LABEL: .Lhas_i32_arg_bitcast.1:
-; CHECK-NEXT: .param i32, i32
+; CHECK-NEXT: .functype .Lhas_i32_arg_bitcast.1 (i32, i32) -> ()
; CHECK-NEXT: call has_i32_arg at FUNCTION, $0{{$}}
; CHECK-NEXT: end_function
; CHECK-LABEL: .Lhas_i32_arg_bitcast.2:
-; CHECK-NEXT: call has_i32_arg at FUNCTION, $0{{$}}
+; CHECK: call has_i32_arg at FUNCTION, $0{{$}}
; CHECK-NEXT: end_function
; CHECK-LABEL: .Lhas_i32_ret_bitcast:
-; CHECK-NEXT: call $drop=, has_i32_ret at FUNCTION{{$}}
+; CHECK: call $drop=, has_i32_ret at FUNCTION{{$}}
; CHECK-NEXT: end_function
; CHECK-LABEL: .Lvararg_bitcast:
@@ -192,12 +192,12 @@ end:
; CHECK: end_function
; CHECK-LABEL: .Lfoo0_bitcast:
-; CHECK-NEXT: .param i32
+; CHECK-NEXT: .functype .Lfoo0_bitcast (i32) -> ()
; CHECK-NEXT: call foo0 at FUNCTION{{$}}
; CHECK-NEXT: end_function
; CHECK-LABEL: .Lfoo1_bitcast:
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .functype .Lfoo1_bitcast () -> (i32)
; CHECK-NEXT: call foo1 at FUNCTION{{$}}
; CHECK-NEXT: copy_local $push0=, $0
; CHECK-NEXT: end_function
Modified: llvm/trunk/test/CodeGen/WebAssembly/global.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/global.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/global.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/global.ll Mon Nov 19 09:10:36 2018
@@ -19,8 +19,7 @@ define i32 @foo() {
}
; CHECK-LABEL: call_memcpy:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype call_memcpy (i32, i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.call $push0=, memcpy at FUNCTION, $0, $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
Modified: llvm/trunk/test/CodeGen/WebAssembly/i128-returned.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/i128-returned.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/i128-returned.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/i128-returned.ll Mon Nov 19 09:10:36 2018
@@ -14,7 +14,6 @@ define i128 @foo(i128) {
}
; CHECK-LABEL: foo:
-; CHECK-NEXT: .param i32, i64, i64
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype foo (i32, i64, i64) -> ()
-; CHECK: .functype bar, void, i32, i64, i64
+; CHECK: .functype bar (i32, i64, i64) -> ()
Modified: llvm/trunk/test/CodeGen/WebAssembly/i128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/i128.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/i128.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/i128.ll Mon Nov 19 09:10:36 2018
@@ -10,7 +10,7 @@ declare i128 @llvm.cttz.i128(i128, i1)
declare i128 @llvm.ctpop.i128(i128)
; CHECK-LABEL: add128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
+; CHECK-NEXT: .functype add128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK-NOT: .result
; CHECK: i64.add
; CHECK: i64.store
@@ -23,8 +23,7 @@ define i128 @add128(i128 %x, i128 %y) {
}
; CHECK-LABEL: sub128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype sub128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: i64.sub
; CHECK: i64.store
; CHECK: i64.sub
@@ -36,8 +35,7 @@ define i128 @sub128(i128 %x, i128 %y) {
}
; CHECK-LABEL: mul128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype mul128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __multi3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
define i128 @mul128(i128 %x, i128 %y) {
@@ -46,8 +44,7 @@ define i128 @mul128(i128 %x, i128 %y) {
}
; CHECK-LABEL: sdiv128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype sdiv128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __divti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
define i128 @sdiv128(i128 %x, i128 %y) {
@@ -56,8 +53,7 @@ define i128 @sdiv128(i128 %x, i128 %y) {
}
; CHECK-LABEL: udiv128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype udiv128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __udivti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
define i128 @udiv128(i128 %x, i128 %y) {
@@ -66,8 +62,7 @@ define i128 @udiv128(i128 %x, i128 %y) {
}
; CHECK-LABEL: srem128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype srem128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __modti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
define i128 @srem128(i128 %x, i128 %y) {
@@ -76,8 +71,7 @@ define i128 @srem128(i128 %x, i128 %y) {
}
; CHECK-LABEL: urem128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype urem128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __umodti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
define i128 @urem128(i128 %x, i128 %y) {
@@ -86,7 +80,7 @@ define i128 @urem128(i128 %x, i128 %y) {
}
; CHECK-LABEL: and128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
+; CHECK-NEXT: .functype and128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK-NOT: .result
; CHECK: i64.and
; CHECK: i64.store
@@ -99,8 +93,7 @@ define i128 @and128(i128 %x, i128 %y) {
}
; CHECK-LABEL: or128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype or128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: i64.or
; CHECK: i64.store
; CHECK: i64.or
@@ -112,8 +105,7 @@ define i128 @or128(i128 %x, i128 %y) {
}
; CHECK-LABEL: xor128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype xor128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: i64.xor
; CHECK: i64.store
; CHECK: i64.xor
@@ -125,8 +117,7 @@ define i128 @xor128(i128 %x, i128 %y) {
}
; CHECK-LABEL: shl128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype shl128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __ashlti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
define i128 @shl128(i128 %x, i128 %y) {
@@ -135,8 +126,7 @@ define i128 @shl128(i128 %x, i128 %y) {
}
; CHECK-LABEL: shr128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype shr128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __lshrti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
define i128 @shr128(i128 %x, i128 %y) {
@@ -145,8 +135,7 @@ define i128 @shr128(i128 %x, i128 %y) {
}
; CHECK-LABEL: sar128:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype sar128 (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __ashrti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
define i128 @sar128(i128 %x, i128 %y) {
@@ -155,7 +144,7 @@ define i128 @sar128(i128 %x, i128 %y) {
}
; CHECK-LABEL: clz128:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype clz128 (i32, i64, i64) -> (){{$}}
; CHECK-NOT: .result
; CHECK: i64.clz
; CHECK: i64.clz
@@ -166,8 +155,7 @@ define i128 @clz128(i128 %x) {
}
; CHECK-LABEL: clz128_zero_undef:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype clz128_zero_undef (i32, i64, i64) -> (){{$}}
; CHECK: i64.clz
; CHECK: i64.clz
; CHECK: return{{$}}
@@ -177,8 +165,7 @@ define i128 @clz128_zero_undef(i128 %x)
}
; CHECK-LABEL: ctz128:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype ctz128 (i32, i64, i64) -> (){{$}}
; CHECK: i64.ctz
; CHECK: i64.ctz
; CHECK: return{{$}}
@@ -188,8 +175,7 @@ define i128 @ctz128(i128 %x) {
}
; CHECK-LABEL: ctz128_zero_undef:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype ctz128_zero_undef (i32, i64, i64) -> (){{$}}
; CHECK: i64.ctz
; CHECK: i64.ctz
; CHECK: return{{$}}
@@ -199,8 +185,7 @@ define i128 @ctz128_zero_undef(i128 %x)
}
; CHECK-LABEL: popcnt128:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype popcnt128 (i32, i64, i64) -> (){{$}}
; CHECK: i64.popcnt
; CHECK: i64.popcnt
; CHECK: return{{$}}
@@ -210,8 +195,7 @@ define i128 @popcnt128(i128 %x) {
}
; CHECK-LABEL: eqz128:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype eqz128 (i64, i64) -> (i32){{$}}
; CHECK: i64.or
; CHECK: i64.eqz
; CHECK: return $
@@ -222,8 +206,7 @@ define i32 @eqz128(i128 %x) {
}
; CHECK-LABEL: rotl:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype rotl (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __ashlti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: call __lshrti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
@@ -236,8 +219,7 @@ define i128 @rotl(i128 %x, i128 %y) {
}
; CHECK-LABEL: masked_rotl:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype masked_rotl (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __ashlti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: call __lshrti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
@@ -251,8 +233,7 @@ define i128 @masked_rotl(i128 %x, i128 %
}
; CHECK-LABEL: rotr:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype rotr (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __lshrti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: call __ashlti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
@@ -265,8 +246,7 @@ define i128 @rotr(i128 %x, i128 %y) {
}
; CHECK-LABEL: masked_rotr:
-; CHECK-NEXT: .param i32, i64, i64, i64, i64{{$}}
-; CHECK-NOT: .result
+; CHECK-NEXT: .functype masked_rotr (i32, i64, i64, i64, i64) -> (){{$}}
; CHECK: call __lshrti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: call __ashlti3 at FUNCTION, ${{.+}}, ${{.+}}, ${{.+}}, ${{.+}}{{$}}
; CHECK: return{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/i32-load-store-alignment.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/i32-load-store-alignment.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/i32-load-store-alignment.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/i32-load-store-alignment.ll Mon Nov 19 09:10:36 2018
@@ -10,8 +10,7 @@ target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
; CHECK-LABEL: ldi32_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi32_a1 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ldi32_a1(i32 *%p) {
@@ -20,8 +19,7 @@ define i32 @ldi32_a1(i32 *%p) {
}
; CHECK-LABEL: ldi32_a2:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi32_a2 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ldi32_a2(i32 *%p) {
@@ -32,8 +30,7 @@ define i32 @ldi32_a2(i32 *%p) {
; 4 is the default alignment for i32 so no attribute is needed.
; CHECK-LABEL: ldi32_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi32_a4 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ldi32_a4(i32 *%p) {
@@ -44,8 +41,7 @@ define i32 @ldi32_a4(i32 *%p) {
; The default alignment in LLVM is the same as the defualt alignment in wasm.
; CHECK-LABEL: ldi32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi32 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ldi32(i32 *%p) {
@@ -56,8 +52,7 @@ define i32 @ldi32(i32 *%p) {
; 8 is greater than the default alignment so it is ignored.
; CHECK-LABEL: ldi32_a8:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi32_a8 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ldi32_a8(i32 *%p) {
@@ -70,8 +65,7 @@ define i32 @ldi32_a8(i32 *%p) {
;===----------------------------------------------------------------------------
; CHECK-LABEL: ldi8_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi8_a1 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i8 @ldi8_a1(i8 *%p) {
@@ -80,8 +74,7 @@ define i8 @ldi8_a1(i8 *%p) {
}
; CHECK-LABEL: ldi8_a2:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi8_a2 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i8 @ldi8_a2(i8 *%p) {
@@ -90,8 +83,7 @@ define i8 @ldi8_a2(i8 *%p) {
}
; CHECK-LABEL: ldi16_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi16_a1 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i16 @ldi16_a1(i16 *%p) {
@@ -100,8 +92,7 @@ define i16 @ldi16_a1(i16 *%p) {
}
; CHECK-LABEL: ldi16_a2:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi16_a2 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i16 @ldi16_a2(i16 *%p) {
@@ -110,8 +101,7 @@ define i16 @ldi16_a2(i16 *%p) {
}
; CHECK-LABEL: ldi16_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi16_a4 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i16 @ldi16_a4(i16 *%p) {
@@ -124,7 +114,7 @@ define i16 @ldi16_a4(i16 *%p) {
;===----------------------------------------------------------------------------
; CHECK-LABEL: sti32_a1:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti32_a1 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_a1(i32 *%p, i32 %v) {
@@ -133,7 +123,7 @@ define void @sti32_a1(i32 *%p, i32 %v) {
}
; CHECK-LABEL: sti32_a2:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti32_a2 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store 0($0):p2align=1, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_a2(i32 *%p, i32 %v) {
@@ -144,7 +134,7 @@ define void @sti32_a2(i32 *%p, i32 %v) {
; 4 is the default alignment for i32 so no attribute is needed.
; CHECK-LABEL: sti32_a4:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti32_a4 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_a4(i32 *%p, i32 %v) {
@@ -155,7 +145,7 @@ define void @sti32_a4(i32 *%p, i32 %v) {
; The default alignment in LLVM is the same as the defualt alignment in wasm.
; CHECK-LABEL: sti32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti32 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32(i32 *%p, i32 %v) {
@@ -164,7 +154,7 @@ define void @sti32(i32 *%p, i32 %v) {
}
; CHECK-LABEL: sti32_a8:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti32_a8 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_a8(i32 *%p, i32 %v) {
@@ -177,7 +167,7 @@ define void @sti32_a8(i32 *%p, i32 %v) {
;===----------------------------------------------------------------------------
; CHECK-LABEL: sti8_a1:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti8_a1 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store8 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti8_a1(i8 *%p, i8 %v) {
@@ -186,7 +176,7 @@ define void @sti8_a1(i8 *%p, i8 %v) {
}
; CHECK-LABEL: sti8_a2:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti8_a2 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store8 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti8_a2(i8 *%p, i8 %v) {
@@ -195,7 +185,7 @@ define void @sti8_a2(i8 *%p, i8 %v) {
}
; CHECK-LABEL: sti16_a1:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti16_a1 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store16 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti16_a1(i16 *%p, i16 %v) {
@@ -204,7 +194,7 @@ define void @sti16_a1(i16 *%p, i16 %v) {
}
; CHECK-LABEL: sti16_a2:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti16_a2 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store16 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti16_a2(i16 *%p, i16 %v) {
@@ -213,7 +203,7 @@ define void @sti16_a2(i16 *%p, i16 %v) {
}
; CHECK-LABEL: sti16_a4:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti16_a4 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store16 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti16_a4(i16 *%p, i16 %v) {
@@ -229,8 +219,7 @@ define void @sti16_a4(i16 *%p, i16 %v) {
; natural alignment.
; CHECK-LABEL: ldi32_atomic_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi32_atomic_a4 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ldi32_atomic_a4(i32 *%p) {
@@ -241,8 +230,7 @@ define i32 @ldi32_atomic_a4(i32 *%p) {
; 8 is greater than the default alignment so it is ignored.
; CHECK-LABEL: ldi32_atomic_a8:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi32_atomic_a8 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ldi32_atomic_a8(i32 *%p) {
@@ -255,7 +243,7 @@ define i32 @ldi32_atomic_a8(i32 *%p) {
;===----------------------------------------------------------------------------
; CHECK-LABEL: sti32_atomic_a4:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti32_atomic_a4 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_atomic_a4(i32 *%p, i32 %v) {
@@ -266,7 +254,7 @@ define void @sti32_atomic_a4(i32 *%p, i3
; 8 is greater than the default alignment so it is ignored.
; CHECK-LABEL: sti32_atomic_a8:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti32_atomic_a8 (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_atomic_a8(i32 *%p, i32 %v) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/i32.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/i32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/i32.ll Mon Nov 19 09:10:36 2018
@@ -10,8 +10,7 @@ declare i32 @llvm.cttz.i32(i32, i1)
declare i32 @llvm.ctpop.i32(i32)
; CHECK-LABEL: add32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype add32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.add $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -22,8 +21,7 @@ define i32 @add32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sub32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype sub32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.sub $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -34,8 +32,7 @@ define i32 @sub32(i32 %x, i32 %y) {
}
; CHECK-LABEL: mul32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype mul32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.mul $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -46,8 +43,7 @@ define i32 @mul32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sdiv32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype sdiv32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.div_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -58,8 +54,7 @@ define i32 @sdiv32(i32 %x, i32 %y) {
}
; CHECK-LABEL: udiv32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype udiv32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.div_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -70,8 +65,7 @@ define i32 @udiv32(i32 %x, i32 %y) {
}
; CHECK-LABEL: srem32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype srem32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.rem_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -82,8 +76,7 @@ define i32 @srem32(i32 %x, i32 %y) {
}
; CHECK-LABEL: urem32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype urem32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.rem_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -94,8 +87,7 @@ define i32 @urem32(i32 %x, i32 %y) {
}
; CHECK-LABEL: and32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype and32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.and $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -106,8 +98,7 @@ define i32 @and32(i32 %x, i32 %y) {
}
; CHECK-LABEL: or32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype or32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.or $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -118,8 +109,7 @@ define i32 @or32(i32 %x, i32 %y) {
}
; CHECK-LABEL: xor32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype xor32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.xor $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -130,8 +120,7 @@ define i32 @xor32(i32 %x, i32 %y) {
}
; CHECK-LABEL: shl32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype shl32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.shl $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -142,8 +131,7 @@ define i32 @shl32(i32 %x, i32 %y) {
}
; CHECK-LABEL: shr32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype shr32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.shr_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -154,8 +142,7 @@ define i32 @shr32(i32 %x, i32 %y) {
}
; CHECK-LABEL: sar32:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype sar32 (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.shr_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -166,8 +153,7 @@ define i32 @sar32(i32 %x, i32 %y) {
}
; CHECK-LABEL: clz32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype clz32 (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.clz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -177,8 +163,7 @@ define i32 @clz32(i32 %x) {
}
; CHECK-LABEL: clz32_zero_undef:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype clz32_zero_undef (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.clz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -188,8 +173,7 @@ define i32 @clz32_zero_undef(i32 %x) {
}
; CHECK-LABEL: ctz32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ctz32 (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.ctz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -199,8 +183,7 @@ define i32 @ctz32(i32 %x) {
}
; CHECK-LABEL: ctz32_zero_undef:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ctz32_zero_undef (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.ctz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -210,8 +193,7 @@ define i32 @ctz32_zero_undef(i32 %x) {
}
; CHECK-LABEL: popcnt32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype popcnt32 (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.popcnt $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -221,8 +203,7 @@ define i32 @popcnt32(i32 %x) {
}
; CHECK-LABEL: eqz32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype eqz32 (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.eqz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -233,8 +214,7 @@ define i32 @eqz32(i32 %x) {
}
; CHECK-LABEL: rotl:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype rotl (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.rotl $push0=, $pop[[L0]], $pop[[L1]]
@@ -248,8 +228,7 @@ define i32 @rotl(i32 %x, i32 %y) {
}
; CHECK-LABEL: masked_rotl:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype masked_rotl (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.rotl $push0=, $pop[[L0]], $pop[[L1]]
@@ -264,8 +243,7 @@ define i32 @masked_rotl(i32 %x, i32 %y)
}
; CHECK-LABEL: rotr:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype rotr (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.rotr $push0=, $pop[[L0]], $pop[[L1]]
@@ -279,8 +257,7 @@ define i32 @rotr(i32 %x, i32 %y) {
}
; CHECK-LABEL: masked_rotr:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype masked_rotr (i32, i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.rotr $push0=, $pop[[L0]], $pop[[L1]]
Modified: llvm/trunk/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/i64-load-store-alignment.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/i64-load-store-alignment.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/i64-load-store-alignment.ll Mon Nov 19 09:10:36 2018
@@ -10,8 +10,7 @@ target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
; CHECK-LABEL: ldi64_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64_a1 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi64_a1(i64 *%p) {
@@ -20,8 +19,7 @@ define i64 @ldi64_a1(i64 *%p) {
}
; CHECK-LABEL: ldi64_a2:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64_a2 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi64_a2(i64 *%p) {
@@ -30,8 +28,7 @@ define i64 @ldi64_a2(i64 *%p) {
}
; CHECK-LABEL: ldi64_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64_a4 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=2{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi64_a4(i64 *%p) {
@@ -42,8 +39,7 @@ define i64 @ldi64_a4(i64 *%p) {
; 8 is the default alignment for i64 so no attribute is needed.
; CHECK-LABEL: ldi64_a8:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64_a8 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi64_a8(i64 *%p) {
@@ -54,8 +50,7 @@ define i64 @ldi64_a8(i64 *%p) {
; The default alignment in LLVM is the same as the defualt alignment in wasm.
; CHECK-LABEL: ldi64:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi64(i64 *%p) {
@@ -66,8 +61,7 @@ define i64 @ldi64(i64 *%p) {
; 16 is greater than the default alignment so it is ignored.
; CHECK-LABEL: ldi64_a16:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64_a16 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi64_a16(i64 *%p) {
@@ -80,8 +74,7 @@ define i64 @ldi64_a16(i64 *%p) {
;===----------------------------------------------------------------------------
; CHECK-LABEL: ldi8_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi8_a1 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi8_a1(i8 *%p) {
@@ -91,8 +84,7 @@ define i64 @ldi8_a1(i8 *%p) {
}
; CHECK-LABEL: ldi8_a2:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi8_a2 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi8_a2(i8 *%p) {
@@ -102,8 +94,7 @@ define i64 @ldi8_a2(i8 *%p) {
}
; CHECK-LABEL: ldi16_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi16_a1 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi16_a1(i16 *%p) {
@@ -113,8 +104,7 @@ define i64 @ldi16_a1(i16 *%p) {
}
; CHECK-LABEL: ldi16_a2:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi16_a2 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi16_a2(i16 *%p) {
@@ -124,8 +114,7 @@ define i64 @ldi16_a2(i16 *%p) {
}
; CHECK-LABEL: ldi16_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi16_a4 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi16_a4(i16 *%p) {
@@ -135,8 +124,7 @@ define i64 @ldi16_a4(i16 *%p) {
}
; CHECK-LABEL: ldi32_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi32_a1 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi32_a1(i32 *%p) {
@@ -146,8 +134,7 @@ define i64 @ldi32_a1(i32 *%p) {
}
; CHECK-LABEL: ldi32_a2:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi32_a2 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi32_a2(i32 *%p) {
@@ -157,8 +144,7 @@ define i64 @ldi32_a2(i32 *%p) {
}
; CHECK-LABEL: ldi32_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi32_a4 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi32_a4(i32 *%p) {
@@ -168,8 +154,7 @@ define i64 @ldi32_a4(i32 *%p) {
}
; CHECK-LABEL: ldi32_a8:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi32_a8 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi32_a8(i32 *%p) {
@@ -183,7 +168,7 @@ define i64 @ldi32_a8(i32 *%p) {
;===----------------------------------------------------------------------------
; CHECK-LABEL: sti64_a1:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64_a1 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64_a1(i64 *%p, i64 %v) {
@@ -192,7 +177,7 @@ define void @sti64_a1(i64 *%p, i64 %v) {
}
; CHECK-LABEL: sti64_a2:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64_a2 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store 0($0):p2align=1, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64_a2(i64 *%p, i64 %v) {
@@ -201,7 +186,7 @@ define void @sti64_a2(i64 *%p, i64 %v) {
}
; CHECK-LABEL: sti64_a4:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64_a4 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store 0($0):p2align=2, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64_a4(i64 *%p, i64 %v) {
@@ -212,7 +197,7 @@ define void @sti64_a4(i64 *%p, i64 %v) {
; 8 is the default alignment for i32 so no attribute is needed.
; CHECK-LABEL: sti64_a8:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64_a8 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64_a8(i64 *%p, i64 %v) {
@@ -223,7 +208,7 @@ define void @sti64_a8(i64 *%p, i64 %v) {
; The default alignment in LLVM is the same as the defualt alignment in wasm.
; CHECK-LABEL: sti64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64(i64 *%p, i64 %v) {
@@ -232,7 +217,7 @@ define void @sti64(i64 *%p, i64 %v) {
}
; CHECK-LABEL: sti64_a16:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64_a16 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64_a16(i64 *%p, i64 %v) {
@@ -245,7 +230,7 @@ define void @sti64_a16(i64 *%p, i64 %v)
;===----------------------------------------------------------------------------
; CHECK-LABEL: sti8_a1:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti8_a1 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store8 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti8_a1(i8 *%p, i64 %w) {
@@ -255,7 +240,7 @@ define void @sti8_a1(i8 *%p, i64 %w) {
}
; CHECK-LABEL: sti8_a2:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti8_a2 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store8 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti8_a2(i8 *%p, i64 %w) {
@@ -265,7 +250,7 @@ define void @sti8_a2(i8 *%p, i64 %w) {
}
; CHECK-LABEL: sti16_a1:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti16_a1 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store16 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti16_a1(i16 *%p, i64 %w) {
@@ -275,7 +260,7 @@ define void @sti16_a1(i16 *%p, i64 %w) {
}
; CHECK-LABEL: sti16_a2:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti16_a2 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store16 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti16_a2(i16 *%p, i64 %w) {
@@ -285,7 +270,7 @@ define void @sti16_a2(i16 *%p, i64 %w) {
}
; CHECK-LABEL: sti16_a4:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti16_a4 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store16 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti16_a4(i16 *%p, i64 %w) {
@@ -295,7 +280,7 @@ define void @sti16_a4(i16 *%p, i64 %w) {
}
; CHECK-LABEL: sti32_a1:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti32_a1 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store32 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_a1(i32 *%p, i64 %w) {
@@ -305,7 +290,7 @@ define void @sti32_a1(i32 *%p, i64 %w) {
}
; CHECK-LABEL: sti32_a2:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti32_a2 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store32 0($0):p2align=1, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_a2(i32 *%p, i64 %w) {
@@ -315,7 +300,7 @@ define void @sti32_a2(i32 *%p, i64 %w) {
}
; CHECK-LABEL: sti32_a4:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti32_a4 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store32 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_a4(i32 *%p, i64 %w) {
@@ -325,7 +310,7 @@ define void @sti32_a4(i32 *%p, i64 %w) {
}
; CHECK-LABEL: sti32_a8:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti32_a8 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.store32 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti32_a8(i32 *%p, i64 %w) {
@@ -342,8 +327,7 @@ define void @sti32_a8(i32 *%p, i64 %w) {
; natural alignment.
; CHECK-LABEL: ldi64_atomic_a8:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64_atomic_a8 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi64_atomic_a8(i64 *%p) {
@@ -354,8 +338,7 @@ define i64 @ldi64_atomic_a8(i64 *%p) {
; 16 is greater than the default alignment so it is ignored.
; CHECK-LABEL: ldi64_atomic_a16:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64_atomic_a16 (i32) -> (i64){{$}}
; CHECK-NEXT: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @ldi64_atomic_a16(i64 *%p) {
@@ -368,7 +351,7 @@ define i64 @ldi64_atomic_a16(i64 *%p) {
;===----------------------------------------------------------------------------
; CHECK-LABEL: sti64_atomic_a4:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64_atomic_a4 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64_atomic_a4(i64 *%p, i64 %v) {
@@ -379,7 +362,7 @@ define void @sti64_atomic_a4(i64 *%p, i6
; 16 is greater than the default alignment so it is ignored.
; CHECK-LABEL: sti64_atomic_a8:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64_atomic_a8 (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @sti64_atomic_a8(i64 *%p, i64 %v) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/i64.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/i64.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/i64.ll Mon Nov 19 09:10:36 2018
@@ -10,8 +10,7 @@ declare i64 @llvm.cttz.i64(i64, i1)
declare i64 @llvm.ctpop.i64(i64)
; CHECK-LABEL: add64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype add64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.add $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -22,8 +21,7 @@ define i64 @add64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sub64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype sub64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.sub $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -34,8 +32,7 @@ define i64 @sub64(i64 %x, i64 %y) {
}
; CHECK-LABEL: mul64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype mul64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.mul $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -46,8 +43,7 @@ define i64 @mul64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sdiv64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype sdiv64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.div_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -58,8 +54,7 @@ define i64 @sdiv64(i64 %x, i64 %y) {
}
; CHECK-LABEL: udiv64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype udiv64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.div_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -70,8 +65,7 @@ define i64 @udiv64(i64 %x, i64 %y) {
}
; CHECK-LABEL: srem64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype srem64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.rem_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -82,8 +76,7 @@ define i64 @srem64(i64 %x, i64 %y) {
}
; CHECK-LABEL: urem64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype urem64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.rem_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -94,8 +87,7 @@ define i64 @urem64(i64 %x, i64 %y) {
}
; CHECK-LABEL: and64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype and64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.and $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -106,8 +98,7 @@ define i64 @and64(i64 %x, i64 %y) {
}
; CHECK-LABEL: or64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype or64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.or $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -118,8 +109,7 @@ define i64 @or64(i64 %x, i64 %y) {
}
; CHECK-LABEL: xor64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype xor64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.xor $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -130,8 +120,7 @@ define i64 @xor64(i64 %x, i64 %y) {
}
; CHECK-LABEL: shl64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype shl64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.shl $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -142,8 +131,7 @@ define i64 @shl64(i64 %x, i64 %y) {
}
; CHECK-LABEL: shr64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype shr64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.shr_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -154,8 +142,7 @@ define i64 @shr64(i64 %x, i64 %y) {
}
; CHECK-LABEL: sar64:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype sar64 (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.shr_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -166,8 +153,7 @@ define i64 @sar64(i64 %x, i64 %y) {
}
; CHECK-LABEL: clz64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype clz64 (i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.clz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -177,8 +163,7 @@ define i64 @clz64(i64 %x) {
}
; CHECK-LABEL: clz64_zero_undef:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype clz64_zero_undef (i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.clz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -188,8 +173,7 @@ define i64 @clz64_zero_undef(i64 %x) {
}
; CHECK-LABEL: ctz64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ctz64 (i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.ctz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -199,8 +183,7 @@ define i64 @ctz64(i64 %x) {
}
; CHECK-LABEL: ctz64_zero_undef:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ctz64_zero_undef (i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.ctz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -210,8 +193,7 @@ define i64 @ctz64_zero_undef(i64 %x) {
}
; CHECK-LABEL: popcnt64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype popcnt64 (i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.popcnt $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -221,8 +203,7 @@ define i64 @popcnt64(i64 %x) {
}
; CHECK-LABEL: eqz64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype eqz64 (i64) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.eqz $push0=, $pop[[L0]]{{$}}
; CHECK-NEXT: return $pop0{{$}}
@@ -233,8 +214,7 @@ define i32 @eqz64(i64 %x) {
}
; CHECK-LABEL: rotl:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype rotl (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.rotl $push0=, $pop[[L0]], $pop[[L1]]
@@ -248,8 +228,7 @@ define i64 @rotl(i64 %x, i64 %y) {
}
; CHECK-LABEL: masked_rotl:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype masked_rotl (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.rotl $push0=, $pop[[L0]], $pop[[L1]]
@@ -264,8 +243,7 @@ define i64 @masked_rotl(i64 %x, i64 %y)
}
; CHECK-LABEL: rotr:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype rotr (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.rotr $push0=, $pop[[L0]], $pop[[L1]]
@@ -279,8 +257,7 @@ define i64 @rotr(i64 %x, i64 %y) {
}
; CHECK-LABEL: masked_rotr:
-; CHECK-NEXT: .param i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype masked_rotr (i64, i64) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.rotr $push0=, $pop[[L0]], $pop[[L1]]
Modified: llvm/trunk/test/CodeGen/WebAssembly/immediates.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/immediates.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/immediates.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/immediates.ll Mon Nov 19 09:10:36 2018
@@ -11,7 +11,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: zero_i32:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype zero_i32 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @zero_i32() {
@@ -19,7 +19,7 @@ define i32 @zero_i32() {
}
; CHECK-LABEL: one_i32:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype one_i32 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @one_i32() {
@@ -27,7 +27,7 @@ define i32 @one_i32() {
}
; CHECK-LABEL: max_i32:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype max_i32 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 2147483647{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @max_i32() {
@@ -35,7 +35,7 @@ define i32 @max_i32() {
}
; CHECK-LABEL: min_i32:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype min_i32 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, -2147483648{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @min_i32() {
@@ -43,7 +43,7 @@ define i32 @min_i32() {
}
; CHECK-LABEL: zero_i64:
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype zero_i64 () -> (i64){{$}}
; CHECK-NEXT: i64.const $push[[NUM:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @zero_i64() {
@@ -51,7 +51,7 @@ define i64 @zero_i64() {
}
; CHECK-LABEL: one_i64:
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype one_i64 () -> (i64){{$}}
; CHECK-NEXT: i64.const $push[[NUM:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @one_i64() {
@@ -59,7 +59,7 @@ define i64 @one_i64() {
}
; CHECK-LABEL: max_i64:
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype max_i64 () -> (i64){{$}}
; CHECK-NEXT: i64.const $push[[NUM:[0-9]+]]=, 9223372036854775807{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @max_i64() {
@@ -67,7 +67,7 @@ define i64 @max_i64() {
}
; CHECK-LABEL: min_i64:
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype min_i64 () -> (i64){{$}}
; CHECK-NEXT: i64.const $push[[NUM:[0-9]+]]=, -9223372036854775808{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @min_i64() {
@@ -75,7 +75,7 @@ define i64 @min_i64() {
}
; CHECK-LABEL: negzero_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype negzero_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -0x0p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @negzero_f32() {
@@ -83,7 +83,7 @@ define float @negzero_f32() {
}
; CHECK-LABEL: zero_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype zero_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, 0x0p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @zero_f32() {
@@ -91,7 +91,7 @@ define float @zero_f32() {
}
; CHECK-LABEL: one_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype one_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, 0x1p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @one_f32() {
@@ -99,7 +99,7 @@ define float @one_f32() {
}
; CHECK-LABEL: two_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype two_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, 0x1p1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @two_f32() {
@@ -107,7 +107,7 @@ define float @two_f32() {
}
; CHECK-LABEL: nan_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype nan_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, nan{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @nan_f32() {
@@ -115,7 +115,7 @@ define float @nan_f32() {
}
; CHECK-LABEL: negnan_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype negnan_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -nan{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @negnan_f32() {
@@ -123,7 +123,7 @@ define float @negnan_f32() {
}
; CHECK-LABEL: inf_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype inf_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, infinity{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @inf_f32() {
@@ -131,7 +131,7 @@ define float @inf_f32() {
}
; CHECK-LABEL: neginf_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype neginf_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -infinity{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @neginf_f32() {
@@ -139,7 +139,7 @@ define float @neginf_f32() {
}
; CHECK-LABEL: custom_nan_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype custom_nan_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -nan:0x6bcdef{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @custom_nan_f32() {
@@ -150,7 +150,7 @@ define float @custom_nan_f32() {
; conversion, so the bits of the NaN are not fully preserved.
; CHECK-LABEL: custom_nans_f32:
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype custom_nans_f32 () -> (f32){{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -nan:0x6bcdef{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define float @custom_nans_f32() {
@@ -158,7 +158,7 @@ define float @custom_nans_f32() {
}
; CHECK-LABEL: negzero_f64:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype negzero_f64 () -> (f64){{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -0x0p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @negzero_f64() {
@@ -166,7 +166,7 @@ define double @negzero_f64() {
}
; CHECK-LABEL: zero_f64:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype zero_f64 () -> (f64){{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, 0x0p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @zero_f64() {
@@ -174,7 +174,7 @@ define double @zero_f64() {
}
; CHECK-LABEL: one_f64:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype one_f64 () -> (f64){{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, 0x1p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @one_f64() {
@@ -182,7 +182,7 @@ define double @one_f64() {
}
; CHECK-LABEL: two_f64:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype two_f64 () -> (f64){{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, 0x1p1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @two_f64() {
@@ -190,7 +190,7 @@ define double @two_f64() {
}
; CHECK-LABEL: nan_f64:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype nan_f64 () -> (f64){{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, nan{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @nan_f64() {
@@ -198,7 +198,7 @@ define double @nan_f64() {
}
; CHECK-LABEL: negnan_f64:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype negnan_f64 () -> (f64){{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -nan{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @negnan_f64() {
@@ -206,7 +206,7 @@ define double @negnan_f64() {
}
; CHECK-LABEL: inf_f64:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype inf_f64 () -> (f64){{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, infinity{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @inf_f64() {
@@ -214,7 +214,7 @@ define double @inf_f64() {
}
; CHECK-LABEL: neginf_f64:
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype neginf_f64 () -> (f64){{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -infinity{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define double @neginf_f64() {
@@ -226,7 +226,7 @@ define double @neginf_f64() {
;; care about preserving NaN payloads.
; XXX-CHECK-LABEL: custom_nan_f64:
-; XXX-CHECK-NEXT: .result f64{{$}}
+; XXX-CHECK-NEXT: .functype custom_nan_f64 () -> (f64){{$}}
; XXX-CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -nan:0xabcdef0123456{{$}}
; XXX-CHECK-NEXT: return $pop[[NUM]]{{$}}
; define double @custom_nan_f64() {
@@ -234,7 +234,7 @@ define double @neginf_f64() {
; }
; XXX-CHECK-LABEL: custom_nans_f64:
-; XXX-CHECK-NEXT: .result f64{{$}}
+; XXX-CHECK-NEXT: .functype custom_nans_f64 () -> (f64){{$}}
; XXX-CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -nan:0x2bcdef0123456{{$}}
; XXX-CHECK-NEXT: return $pop[[NUM]]{{$}}
; define double @custom_nans_f64() {
Modified: llvm/trunk/test/CodeGen/WebAssembly/indirect-import.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/indirect-import.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/indirect-import.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/indirect-import.ll Mon Nov 19 09:10:36 2018
@@ -70,10 +70,10 @@ attributes #0 = { nounwind "disable-tail
attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }
-; CHECK: .functype extern_fd, f32, f64
-; CHECK: .functype extern_vj, void, i64
-; CHECK: .functype extern_v, void
-; CHECK: .functype extern_ijidf, i32, i64, i32, f64, f32
-; CHECK: .functype extern_struct, void, i32
-; CHECK: .functype extern_sret, void, i32
-; CHECK: .functype extern_i128ret, void, i32, i64
+; CHECK: .functype extern_fd (f64) -> (f32)
+; CHECK: .functype extern_vj (i64) -> ()
+; CHECK: .functype extern_v () -> ()
+; CHECK: .functype extern_ijidf (i64, i32, f64, f32) -> (i32)
+; CHECK: .functype extern_struct (i32) -> ()
+; CHECK: .functype extern_sret (i32) -> ()
+; CHECK: .functype extern_i128ret (i32, i64) -> ()
Modified: llvm/trunk/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll Mon Nov 19 09:10:36 2018
@@ -21,8 +21,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: main:
-; CHECK-NEXT: .param i32, i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .functype main (i32, i32) -> (i32)
; CHECK-NEXT: .local i32
; CHECK-NEXT: i32.const 1
; CHECK-NEXT: set_local [[SRC:[0-9]+]]
Modified: llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: foo:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype foo (i32) -> (i32){{$}}
; CHECK-NEXT: #APP{{$}}
; CHECK-NEXT: # 0 = aaa(0){{$}}
; CHECK-NEXT: #NO_APP{{$}}
@@ -21,7 +20,7 @@ entry:
}
; CHECK-LABEL: imm:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype imm () -> (i32){{$}}
; CHECK-NEXT: .local i32{{$}}
; CHECK-NEXT: #APP{{$}}
; CHECK-NEXT: # 0 = ccc(42){{$}}
@@ -35,8 +34,7 @@ entry:
}
; CHECK-LABEL: foo_i64:
-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype foo_i64 (i64) -> (i64){{$}}
; CHECK-NEXT: #APP{{$}}
; CHECK-NEXT: # 0 = aaa(0){{$}}
; CHECK-NEXT: #NO_APP{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/load.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/load.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/load.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ldi32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype ldi32 (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -18,8 +17,7 @@ define i32 @ldi32(i32 *%p) {
}
; CHECK-LABEL: ldi64:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype ldi64 (i32) -> (i64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -29,8 +27,7 @@ define i64 @ldi64(i64 *%p) {
}
; CHECK-LABEL: ldf32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype ldf32 (i32) -> (f32){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -40,8 +37,7 @@ define float @ldf32(float *%p) {
}
; CHECK-LABEL: ldf64:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype ldf64 (i32) -> (f64){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/lower-global-dtors.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/lower-global-dtors.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/lower-global-dtors.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/lower-global-dtors.ll Mon Nov 19 09:10:36 2018
@@ -40,11 +40,11 @@ declare void @after_the_null()
]
; CHECK-LABEL: .Lcall_dtors.0:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype .Lcall_dtors.0 (i32) -> (){{$}}
; CHECK-NEXT: call orig_dtor0 at FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors.0:
-; CHECK-NEXT: block
+; CHECK: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors.0 at FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0
; CHECK-NEXT: i32.const $push0=, __dso_handle
@@ -55,12 +55,12 @@ declare void @after_the_null()
; CHECK-NEXT: unreachable
; CHECK-LABEL: .Lcall_dtors.1:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype .Lcall_dtors.1 (i32) -> (){{$}}
; CHECK-NEXT: call orig_dtor1a at FUNCTION{{$}}
; CHECK-NEXT: call orig_dtor1b at FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors.1:
-; CHECK-NEXT: block
+; CHECK: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors.1 at FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0
; CHECK-NEXT: i32.const $push0=, __dso_handle
@@ -71,11 +71,11 @@ declare void @after_the_null()
; CHECK-NEXT: unreachable
; CHECK-LABEL: .Lcall_dtors.1.associated1c0:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype .Lcall_dtors.1.associated1c0 (i32) -> (){{$}}
; CHECK-NEXT: call orig_dtor1c0 at FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors.1.associated1c0:
-; CHECK-NEXT: block
+; CHECK: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors.1.associated1c0 at FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0
; CHECK-NEXT: i32.const $push0=, __dso_handle
@@ -86,12 +86,12 @@ declare void @after_the_null()
; CHECK-NEXT: unreachable
; CHECK-LABEL: .Lcall_dtors.1.associated1c1:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype .Lcall_dtors.1.associated1c1 (i32) -> (){{$}}
; CHECK-NEXT: call orig_dtor1c1a at FUNCTION{{$}}
; CHECK-NEXT: call orig_dtor1c1b at FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors.1.associated1c1:
-; CHECK-NEXT: block
+; CHECK: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors.1.associated1c1 at FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0
; CHECK-NEXT: i32.const $push0=, __dso_handle
@@ -102,11 +102,11 @@ declare void @after_the_null()
; CHECK-NEXT: unreachable
; CHECK-LABEL: .Lcall_dtors:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype .Lcall_dtors (i32) -> (){{$}}
; CHECK-NEXT: call orig_dtor65536 at FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors:
-; CHECK-NEXT: block
+; CHECK: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors at FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0
; CHECK-NEXT: i32.const $push0=, __dso_handle
@@ -127,7 +127,7 @@ declare void @after_the_null()
; CHECK-LABEL: .weak __dso_handle
-; CHECK-LABEL: .functype __cxa_atexit, i32, i32, i32, i32{{$}}
+; CHECK-LABEL: .functype __cxa_atexit (i32, i32, i32) -> (i32){{$}}
; We shouldn't make use of a .fini_array section.
Modified: llvm/trunk/test/CodeGen/WebAssembly/main-declaration.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/main-declaration.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/main-declaration.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/main-declaration.ll Mon Nov 19 09:10:36 2018
@@ -14,6 +14,7 @@ define void @foo() {
; CHECK-NOT: __original_main
; CHECK-LABEL: foo:
+; CHECK-NEXT: .functype foo () -> ()
; CHECK-NEXT: call main at FUNCTION
; CHECK-NEXT: end_function
; CHECK-NOT: __original_main
Modified: llvm/trunk/test/CodeGen/WebAssembly/main-no-args.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/main-no-args.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/main-no-args.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/main-no-args.ll Mon Nov 19 09:10:36 2018
@@ -10,9 +10,9 @@ define void @main() {
}
; CHECK-LABEL: .L__original_main:
+; CHECK-NEXT: .functype .L__original_main () -> ()
; CHECK-NEXT: end_function
; CHECK-LABEL: main:
-; CHECK-NEXT: .param i32, i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .functype main (i32, i32) -> (i32)
; CHECK: call .L__original_main at FUNCTION
Modified: llvm/trunk/test/CodeGen/WebAssembly/main-with-args.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/main-with-args.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/main-with-args.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/main-with-args.ll Mon Nov 19 09:10:36 2018
@@ -10,7 +10,6 @@ define i32 @main(i32 %a, i8** %b) {
}
; CHECK-LABEL: main:
-; CHECK-NEXT: .param i32, i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .functype main (i32, i32) -> (i32)
; CHECK-NOT: __original_main:
Modified: llvm/trunk/test/CodeGen/WebAssembly/memory-addr32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/memory-addr32.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/memory-addr32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/memory-addr32.ll Mon Nov 19 09:10:36 2018
@@ -13,7 +13,7 @@ declare i32 @llvm.wasm.current.memory.i3
declare i32 @llvm.wasm.grow.memory.i32(i32) nounwind
; CHECK-LABEL: memory_size:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype memory_size () -> (i32){{$}}
; CHECK-NEXT: memory.size $push0=, 0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @memory_size() {
@@ -22,8 +22,7 @@ define i32 @memory_size() {
}
; CHECK-LABEL: memory_grow:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype memory_grow (i32) -> (i32){{$}}
; CHECK: memory.grow $push0=, 0, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @memory_grow(i32 %n) {
@@ -32,7 +31,7 @@ define i32 @memory_grow(i32 %n) {
}
; CHECK-LABEL: mem_size:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype mem_size () -> (i32){{$}}
; CHECK-NEXT: mem.size $push0=, 0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @mem_size() {
@@ -41,8 +40,7 @@ define i32 @mem_size() {
}
; CHECK-LABEL: mem_grow:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype mem_grow (i32) -> (i32){{$}}
; CHECK: mem.grow $push0=, 0, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @mem_grow(i32 %n) {
@@ -51,7 +49,7 @@ define i32 @mem_grow(i32 %n) {
}
; CHECK-LABEL: current_memory:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype current_memory () -> (i32){{$}}
; CHECK-NEXT: current_memory $push0={{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @current_memory() {
@@ -60,8 +58,7 @@ define i32 @current_memory() {
}
; CHECK-LABEL: grow_memory:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype grow_memory (i32) -> (i32){{$}}
; CHECK: grow_memory $push0=, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @grow_memory(i32 %n) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/offset-atomics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/offset-atomics.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/offset-atomics.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/offset-atomics.ll Mon Nov 19 09:10:36 2018
@@ -181,7 +181,7 @@ define i64 @load_i64_with_unfolded_gep_o
; Basic store.
; CHECK-LABEL: store_i32_no_offset:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype store_i32_no_offset (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_i32_no_offset(i32 *%p, i32 %v) {
@@ -252,7 +252,7 @@ define void @store_i32_with_unfolded_gep
; When storing from a fixed address, materialize a zero.
; CHECK-LABEL: store_i32_to_numeric_address:
-; CHECK-NEXT: i32.const $push0=, 0{{$}}
+; CHECK: i32.const $push0=, 0{{$}}
; CHECK-NEXT: i32.const $push1=, 0{{$}}
; CHECK-NEXT: i32.atomic.store 42($pop0), $pop1{{$}}
define void @store_i32_to_numeric_address() {
@@ -277,7 +277,7 @@ define void @store_i32_to_global_address
; Basic store.
; CHECK-LABEL: store_i64_no_offset:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype store_i64_no_offset (i32, i64) -> (){{$}}
; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_i64_no_offset(i64 *%p, i64 %v) {
@@ -663,7 +663,7 @@ define void @store_i8_i64_with_folded_or
; Basic RMW.
; CHECK-LABEL: rmw_add_i32_no_offset:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype rmw_add_i32_no_offset (i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @rmw_add_i32_no_offset(i32* %p, i32 %v) {
@@ -757,7 +757,7 @@ define i32 @rmw_add_i32_from_global_addr
; Basic RMW.
; CHECK-LABEL: rmw_add_i64_no_offset:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype rmw_add_i64_no_offset (i32, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.add $push0=, 0($0), $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @rmw_add_i64_no_offset(i64* %p, i64 %v) {
@@ -1078,7 +1078,7 @@ define i8 @rmw_add_i8_i32_retvalue(i8 *%
; Basic RMW.
; CHECK-LABEL: cmpxchg_i32_no_offset:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
+; CHECK-NEXT: .functype cmpxchg_i32_no_offset (i32, i32, i32) -> (i32){{$}}
; CHECK: i32.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @cmpxchg_i32_no_offset(i32* %p, i32 %exp, i32 %new) {
@@ -1180,7 +1180,7 @@ define i32 @cmpxchg_i32_from_global_addr
; Basic RMW.
; CHECK-LABEL: cmpxchg_i64_no_offset:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
+; CHECK-NEXT: .functype cmpxchg_i64_no_offset (i32, i64, i64) -> (i64){{$}}
; CHECK: i64.atomic.rmw.cmpxchg $push0=, 0($0), $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @cmpxchg_i64_no_offset(i64* %p, i64 %exp, i64 %new) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/offset-folding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/offset-folding.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/offset-folding.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/offset-folding.ll Mon Nov 19 09:10:36 2018
@@ -11,7 +11,7 @@ target triple = "wasm32-unknown-unknown"
; Test basic constant offsets of both defined and external symbols.
; CHECK-LABEL: test0:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype test0 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, x+188{{$}}
; CHECK=NEXT: return $pop0{{$}}
define i32* @test0() {
@@ -19,7 +19,7 @@ define i32* @test0() {
}
; CHECK-LABEL: test1:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype test1 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, y+188{{$}}
; CHECK=NEXT: return $pop0{{$}}
define i32* @test1() {
@@ -29,7 +29,7 @@ define i32* @test1() {
; Test zero offsets.
; CHECK-LABEL: test2:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype test2 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, x{{$}}
; CHECK=NEXT: return $pop0{{$}}
define i32* @test2() {
@@ -37,7 +37,7 @@ define i32* @test2() {
}
; CHECK-LABEL: test3:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype test3 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, y{{$}}
; CHECK=NEXT: return $pop0{{$}}
define i32* @test3() {
@@ -47,7 +47,7 @@ define i32* @test3() {
; Test negative offsets.
; CHECK-LABEL: test4:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype test4 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, x-188{{$}}
; CHECK=NEXT: return $pop0{{$}}
define i32* @test4() {
@@ -55,7 +55,7 @@ define i32* @test4() {
}
; CHECK-LABEL: test5:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype test5 () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, y-188{{$}}
; CHECK=NEXT: return $pop0{{$}}
define i32* @test5() {
Modified: llvm/trunk/test/CodeGen/WebAssembly/offset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/offset.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/offset.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/offset.ll Mon Nov 19 09:10:36 2018
@@ -180,7 +180,7 @@ define i64 @load_i64_with_unfolded_gep_o
; Basic store.
; CHECK-LABEL: store_i32_no_offset:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype store_i32_no_offset (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_i32_no_offset(i32 *%p, i32 %v) {
@@ -251,7 +251,7 @@ define void @store_i32_with_unfolded_gep
; When storing from a fixed address, materialize a zero.
; CHECK-LABEL: store_i32_to_numeric_address:
-; CHECK-NEXT: i32.const $push0=, 0{{$}}
+; CHECK: i32.const $push0=, 0{{$}}
; CHECK-NEXT: i32.const $push1=, 0{{$}}
; CHECK-NEXT: i32.store 42($pop0), $pop1{{$}}
define void @store_i32_to_numeric_address() {
Modified: llvm/trunk/test/CodeGen/WebAssembly/reg-stackify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/reg-stackify.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/reg-stackify.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/reg-stackify.ll Mon Nov 19 09:10:36 2018
@@ -100,8 +100,7 @@ define i32 @no_sink_readonly_call(i32 %x
; rearranged to make the stack contiguous.
; CHECK-LABEL: stack_uses:
-; CHECK: .param i32, i32, i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK: .functype stack_uses (i32, i32, i32, i32) -> (i32){{$}}
; CHECK-NEXT: block {{$}}
; CHECK-NEXT: i32.const $push[[L13:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.lt_s $push[[L0:[0-9]+]]=, $0, $pop[[L13]]{{$}}
@@ -124,8 +123,7 @@ define i32 @no_sink_readonly_call(i32 %x
; CHECK-NEXT: i32.const $push14=, 1{{$}}
; CHECK-NEXT: return $pop14{{$}}
; NOREGS-LABEL: stack_uses:
-; NOREGS: .param i32, i32, i32, i32{{$}}
-; NOREGS-NEXT: .result i32{{$}}
+; NOREGS: .functype stack_uses (i32, i32, i32, i32) -> (i32){{$}}
; NOREGS-NEXT: block {{$}}
; NOREGS-NEXT: get_local 0{{$}}
; NOREGS-NEXT: i32.const 1{{$}}
@@ -171,7 +169,7 @@ false:
; be trivially stackified. However, it can be stackified with a tee_local.
; CHECK-LABEL: multiple_uses:
-; CHECK: .param i32, i32, i32{{$}}
+; CHECK: .functype multiple_uses (i32, i32, i32) -> (){{$}}
; CHECK-NEXT: block {{$}}
; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($2){{$}}
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $3=, $pop[[NUM0]]{{$}}
@@ -184,7 +182,7 @@ false:
; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: return{{$}}
; NOREGS-LABEL: multiple_uses:
-; NOREGS: .param i32, i32, i32{{$}}
+; NOREGS: .functype multiple_uses (i32, i32, i32) -> (){{$}}
; NOREGS: .local i32{{$}}
; NOREGS-NEXT: block {{$}}
; NOREGS-NEXT: get_local 2{{$}}
@@ -230,12 +228,12 @@ return:
; CHECK: side_effects:
; CHECK: store
-; CHECK-NEXT: call
+; CHECK: call
; CHECK: store
; CHECK-NEXT: call
; NOREGS: side_effects:
; NOREGS: store
-; NOREGS-NEXT: call
+; NOREGS: call
; NOREGS: store
; NOREGS-NEXT: call
declare void @evoke_side_effects()
@@ -253,8 +251,7 @@ entry:
; tree order.
; CHECK-LABEL: div_tree:
-; CHECK: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK: .functype div_tree (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.div_s $push[[L0:[0-9]+]]=, $0, $1{{$}}
; CHECK-NEXT: i32.div_s $push[[L1:[0-9]+]]=, $2, $3{{$}}
; CHECK-NEXT: i32.div_s $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -272,8 +269,7 @@ entry:
; CHECK-NEXT: i32.div_s $push[[L14:[0-9]+]]=, $pop[[L6]], $pop[[L13]]{{$}}
; CHECK-NEXT: return $pop[[L14]]{{$}}
; NOREGS-LABEL: div_tree:
-; NOREGS: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
-; NOREGS-NEXT: .result i32{{$}}
+; NOREGS: .functype div_tree (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (i32){{$}}
; NOREGS-NEXT: get_local 0{{$}}
; NOREGS-NEXT: get_local 1{{$}}
; NOREGS-NEXT: i32.div_s{{$}}
@@ -329,14 +325,14 @@ entry:
; A simple multiple-use case.
; CHECK-LABEL: simple_multiple_use:
-; CHECK: .param i32, i32{{$}}
+; CHECK: .functype simple_multiple_use (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.mul $push[[NUM0:[0-9]+]]=, $1, $0{{$}}
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
; CHECK-NEXT: call use_a at FUNCTION, $pop[[NUM1]]{{$}}
; CHECK-NEXT: call use_b at FUNCTION, $[[NUM2]]{{$}}
; CHECK-NEXT: return{{$}}
; NOREGS-LABEL: simple_multiple_use:
-; NOREGS: .param i32, i32{{$}}
+; NOREGS: .functype simple_multiple_use (i32, i32) -> (){{$}}
; NOREGS-NEXT: get_local 1{{$}}
; NOREGS-NEXT: get_local 0{{$}}
; NOREGS-NEXT: i32.mul
@@ -357,13 +353,13 @@ define void @simple_multiple_use(i32 %x,
; Multiple uses of the same value in one instruction.
; CHECK-LABEL: multiple_uses_in_same_insn:
-; CHECK: .param i32, i32{{$}}
+; CHECK: .functype multiple_uses_in_same_insn (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.mul $push[[NUM0:[0-9]+]]=, $1, $0{{$}}
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
; CHECK-NEXT: call use_2 at FUNCTION, $pop[[NUM1]], $[[NUM2]]{{$}}
; CHECK-NEXT: return{{$}}
; NOREGS-LABEL: multiple_uses_in_same_insn:
-; NOREGS: .param i32, i32{{$}}
+; NOREGS: .functype multiple_uses_in_same_insn (i32, i32) -> (){{$}}
; NOREGS-NEXT: get_local 1{{$}}
; NOREGS-NEXT: get_local 0{{$}}
; NOREGS-NEXT: i32.mul
@@ -381,8 +377,7 @@ define void @multiple_uses_in_same_insn(
; Commute operands to achieve better stackifying.
; CHECK-LABEL: commute:
-; CHECK-NOT: param
-; CHECK: .result i32{{$}}
+; CHECK: .functype commute () -> (i32){{$}}
; CHECK-NEXT: i32.call $push0=, red at FUNCTION{{$}}
; CHECK-NEXT: i32.call $push1=, green at FUNCTION{{$}}
; CHECK-NEXT: i32.add $push2=, $pop0, $pop1{{$}}
@@ -390,8 +385,7 @@ define void @multiple_uses_in_same_insn(
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}}
; CHECK-NEXT: return $pop4{{$}}
; NOREGS-LABEL: commute:
-; NOREGS-NOT: param
-; NOREGS: .result i32{{$}}
+; NOREGS: .functype commute () -> (i32){{$}}
; NOREGS-NEXT: i32.call red at FUNCTION{{$}}
; NOREGS-NEXT: i32.call green at FUNCTION{{$}}
; NOREGS-NEXT: i32.add {{$}}
@@ -578,11 +572,11 @@ define i32 @store_past_invar_load(i32 %a
}
; CHECK-LABEL: ignore_dbg_value:
-; CHECK-NEXT: .Lfunc_begin
-; CHECK-NEXT: unreachable
+; CHECK: .Lfunc_begin
+; CHECK: unreachable
; NOREGS-LABEL: ignore_dbg_value:
-; NOREGS-NEXT: .Lfunc_begin
-; NOREGS-NEXT: unreachable
+; NOREGS: .Lfunc_begin
+; NOREGS: unreachable
declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
define void @ignore_dbg_value() {
call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7, metadata !9), !dbg !10
Modified: llvm/trunk/test/CodeGen/WebAssembly/return-int32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/return-int32.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/return-int32.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/return-int32.ll Mon Nov 19 09:10:36 2018
@@ -5,8 +5,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: return_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype return_i32 (i32) -> (i32){{$}}
; CHECK-NEXT: get_local $push0=, 0
; CHECK-NEXT: end_function{{$}}
define i32 @return_i32(i32 %p) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/return-void.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/return-void.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/return-void.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/return-void.ll Mon Nov 19 09:10:36 2018
@@ -5,7 +5,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: return_void:
-; CHECK-NEXT: end_function{{$}}
+; CHECK: end_function{{$}}
define void @return_void() {
ret void
}
Modified: llvm/trunk/test/CodeGen/WebAssembly/returned.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/returned.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/returned.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/returned.ll Mon Nov 19 09:10:36 2018
@@ -6,7 +6,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: _Z3foov:
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype _Z3foov () -> (i32){{$}}
; CHECK-NEXT: i32.const $push0=, 1{{$}}
; CHECK-NEXT: {{^}} i32.call $push1=, _Znwm at FUNCTION, $pop0{{$}}
; CHECK-NEXT: {{^}} i32.call $push2=, _ZN5AppleC1Ev at FUNCTION, $pop1{{$}}
@@ -23,8 +23,7 @@ entry:
}
; CHECK-LABEL: _Z3barPvS_l:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype _Z3barPvS_l (i32, i32, i32) -> (i32){{$}}
; CHECK-NEXT: {{^}} i32.call $push0=, memcpy at FUNCTION, $0, $1, $2{{$}}
; CHECK-NEXT: return $pop0{{$}}
declare i8* @memcpy(i8* returned, i8*, i32)
@@ -37,7 +36,7 @@ entry:
; Test that the optimization isn't performed on constant arguments.
; CHECK-LABEL: test_constant_arg:
-; CHECK-NEXT: i32.const $push0=, global{{$}}
+; CHECK: i32.const $push0=, global{{$}}
; CHECK-NEXT: {{^}} i32.call $drop=, returns_arg at FUNCTION, $pop0{{$}}
; CHECK-NEXT: return{{$}}
@global = external global i32
@@ -52,7 +51,7 @@ declare i32* @returns_arg(i32* returned)
; "returned" attribute.
; CHECK-LABEL: test_other_skipped:
-; CHECK-NEXT: .param i32, i32, f64{{$}}
+; CHECK-NEXT: .functype test_other_skipped (i32, i32, f64) -> (){{$}}
; CHECK-NEXT: {{^}} i32.call $drop=, do_something at FUNCTION, $0, $1, $2{{$}}
; CHECK-NEXT: {{^}} call do_something_with_i32 at FUNCTION, $1{{$}}
; CHECK-NEXT: {{^}} call do_something_with_double at FUNCTION, $2{{$}}
@@ -69,8 +68,7 @@ define void @test_other_skipped(i32 %a,
; Test that the optimization is performed on arguments other than the first.
; CHECK-LABEL: test_second_arg:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype test_second_arg (i32, i32) -> (i32){{$}}
; CHECK-NEXT: {{^}} i32.call $push0=, do_something_else at FUNCTION, $0, $1{{$}}
; CHECK-NEXT: return $pop0{{$}}
declare i32 @do_something_else(i32, i32 returned)
Modified: llvm/trunk/test/CodeGen/WebAssembly/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/select.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/select.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/select.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: select_i32_bool:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype select_i32_bool (i32, i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.select $push0=, $1, $2, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @select_i32_bool(i1 zeroext %a, i32 %b, i32 %c) {
@@ -17,8 +16,7 @@ define i32 @select_i32_bool(i1 zeroext %
}
; CHECK-LABEL: select_i32_bool_nozext:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype select_i32_bool_nozext (i32, i32, i32) -> (i32){{$}}
; SLOW-NEXT: i32.select $push0=, $1, $2, $0{{$}}
; SLOW-NEXT: return $pop0{{$}}
define i32 @select_i32_bool_nozext(i1 %a, i32 %b, i32 %c) {
@@ -27,8 +25,7 @@ define i32 @select_i32_bool_nozext(i1 %a
}
; CHECK-LABEL: select_i32_eq:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype select_i32_eq (i32, i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.select $push0=, $2, $1, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @select_i32_eq(i32 %a, i32 %b, i32 %c) {
@@ -38,8 +35,7 @@ define i32 @select_i32_eq(i32 %a, i32 %b
}
; CHECK-LABEL: select_i32_ne:
-; CHECK-NEXT: .param i32, i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype select_i32_ne (i32, i32, i32) -> (i32){{$}}
; CHECK-NEXT: i32.select $push0=, $1, $2, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i32 @select_i32_ne(i32 %a, i32 %b, i32 %c) {
@@ -49,8 +45,7 @@ define i32 @select_i32_ne(i32 %a, i32 %b
}
; CHECK-LABEL: select_i64_bool:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype select_i64_bool (i32, i64, i64) -> (i64){{$}}
; CHECK-NEXT: i64.select $push0=, $1, $2, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @select_i64_bool(i1 zeroext %a, i64 %b, i64 %c) {
@@ -59,8 +54,7 @@ define i64 @select_i64_bool(i1 zeroext %
}
; CHECK-LABEL: select_i64_bool_nozext:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype select_i64_bool_nozext (i32, i64, i64) -> (i64){{$}}
; SLOW-NEXT: i64.select $push0=, $1, $2, $0{{$}}
; SLOW-NEXT: return $pop0{{$}}
define i64 @select_i64_bool_nozext(i1 %a, i64 %b, i64 %c) {
@@ -69,8 +63,7 @@ define i64 @select_i64_bool_nozext(i1 %a
}
; CHECK-LABEL: select_i64_eq:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype select_i64_eq (i32, i64, i64) -> (i64){{$}}
; CHECK-NEXT: i64.select $push0=, $2, $1, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @select_i64_eq(i32 %a, i64 %b, i64 %c) {
@@ -80,8 +73,7 @@ define i64 @select_i64_eq(i32 %a, i64 %b
}
; CHECK-LABEL: select_i64_ne:
-; CHECK-NEXT: .param i32, i64, i64{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype select_i64_ne (i32, i64, i64) -> (i64){{$}}
; CHECK-NEXT: i64.select $push0=, $1, $2, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define i64 @select_i64_ne(i32 %a, i64 %b, i64 %c) {
@@ -91,8 +83,7 @@ define i64 @select_i64_ne(i32 %a, i64 %b
}
; CHECK-LABEL: select_f32_bool:
-; CHECK-NEXT: .param i32, f32, f32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype select_f32_bool (i32, f32, f32) -> (f32){{$}}
; CHECK-NEXT: f32.select $push0=, $1, $2, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define float @select_f32_bool(i1 zeroext %a, float %b, float %c) {
@@ -101,8 +92,7 @@ define float @select_f32_bool(i1 zeroext
}
; CHECK-LABEL: select_f32_bool_nozext:
-; CHECK-NEXT: .param i32, f32, f32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype select_f32_bool_nozext (i32, f32, f32) -> (f32){{$}}
; SLOW-NEXT: f32.select $push0=, $1, $2, $0{{$}}
; SLOW-NEXT: return $pop0{{$}}
define float @select_f32_bool_nozext(i1 %a, float %b, float %c) {
@@ -111,8 +101,7 @@ define float @select_f32_bool_nozext(i1
}
; CHECK-LABEL: select_f32_eq:
-; CHECK-NEXT: .param i32, f32, f32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype select_f32_eq (i32, f32, f32) -> (f32){{$}}
; CHECK-NEXT: f32.select $push0=, $2, $1, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define float @select_f32_eq(i32 %a, float %b, float %c) {
@@ -122,8 +111,7 @@ define float @select_f32_eq(i32 %a, floa
}
; CHECK-LABEL: select_f32_ne:
-; CHECK-NEXT: .param i32, f32, f32{{$}}
-; CHECK-NEXT: .result f32{{$}}
+; CHECK-NEXT: .functype select_f32_ne (i32, f32, f32) -> (f32){{$}}
; CHECK-NEXT: f32.select $push0=, $1, $2, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define float @select_f32_ne(i32 %a, float %b, float %c) {
@@ -133,8 +121,7 @@ define float @select_f32_ne(i32 %a, floa
}
; CHECK-LABEL: select_f64_bool:
-; CHECK-NEXT: .param i32, f64, f64{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype select_f64_bool (i32, f64, f64) -> (f64){{$}}
; CHECK-NEXT: f64.select $push0=, $1, $2, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define double @select_f64_bool(i1 zeroext %a, double %b, double %c) {
@@ -143,8 +130,7 @@ define double @select_f64_bool(i1 zeroex
}
; CHECK-LABEL: select_f64_bool_nozext:
-; CHECK-NEXT: .param i32, f64, f64{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype select_f64_bool_nozext (i32, f64, f64) -> (f64){{$}}
; SLOW-NEXT: f64.select $push0=, $1, $2, $0{{$}}
; SLOW-NEXT: return $pop0{{$}}
define double @select_f64_bool_nozext(i1 %a, double %b, double %c) {
@@ -153,8 +139,7 @@ define double @select_f64_bool_nozext(i1
}
; CHECK-LABEL: select_f64_eq:
-; CHECK-NEXT: .param i32, f64, f64{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype select_f64_eq (i32, f64, f64) -> (f64){{$}}
; CHECK-NEXT: f64.select $push0=, $2, $1, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define double @select_f64_eq(i32 %a, double %b, double %c) {
@@ -164,8 +149,7 @@ define double @select_f64_eq(i32 %a, dou
}
; CHECK-LABEL: select_f64_ne:
-; CHECK-NEXT: .param i32, f64, f64{{$}}
-; CHECK-NEXT: .result f64{{$}}
+; CHECK-NEXT: .functype select_f64_ne (i32, f64, f64) -> (f64){{$}}
; CHECK-NEXT: f64.select $push0=, $1, $2, $0{{$}}
; CHECK-NEXT: return $pop0{{$}}
define double @select_f64_ne(i32 %a, double %b, double %c) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/signext-inreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/signext-inreg.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/signext-inreg.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/signext-inreg.ll Mon Nov 19 09:10:36 2018
@@ -5,8 +5,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_extend8_s:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_extend8_s (i32) -> (i32){{$}}
; CHECK-NEXT: i32.extend8_s $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -18,8 +17,7 @@ define i32 @i32_extend8_s(i8 %x) {
}
; CHECK-LABEL: i32_extend16_s:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype i32_extend16_s (i32) -> (i32){{$}}
; CHECK-NEXT: i32.extend16_s $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
@@ -31,8 +29,7 @@ define i32 @i32_extend16_s(i16 %x) {
}
; CHECK-LABEL: i64_extend8_s:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_extend8_s (i32) -> (i64){{$}}
; CHECK-NEXT: i64.extend_u/i32 $push[[NUM1:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: i64.extend8_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
@@ -45,8 +42,7 @@ define i64 @i64_extend8_s(i8 %x) {
}
; CHECK-LABEL: i64_extend16_s:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_extend16_s (i32) -> (i64){{$}}
; CHECK-NEXT: i64.extend_u/i32 $push[[NUM1:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: i64.extend16_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
@@ -60,8 +56,7 @@ define i64 @i64_extend16_s(i16 %x) {
; No SIGN_EXTEND_INREG is needed for 32->64 extension.
; CHECK-LABEL: i64_extend32_s:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: .functype i64_extend32_s (i32) -> (i64){{$}}
; CHECK-NEXT: i64.extend_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i64 @i64_extend32_s(i32 %x) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/signext-zeroext.ll Mon Nov 19 09:10:36 2018
@@ -6,8 +6,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: z2s_func:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype z2s_func (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 24{{$}}
; CHECK-NEXT: i32.shl $push[[NUM2:[0-9]+]]=, $0, $pop[[NUM0]]{{$}}
; CHECK-NEXT: i32.const $push[[NUM1:[0-9]+]]=, 24{{$}}
@@ -18,8 +17,7 @@ define signext i8 @z2s_func(i8 zeroext %
}
; CHECK-LABEL: s2z_func:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype s2z_func (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 255{{$}}
; CHECK-NEXT: i32.and $push[[NUM1:[0-9]+]]=, $0, $pop[[NUM0]]{{$}}
; CHECK-NEXT: return $pop[[NUM1]]{{$}}
@@ -28,8 +26,7 @@ define zeroext i8 @s2z_func(i8 signext %
}
; CHECK-LABEL: z2s_call:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype z2s_call (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 255{{$}}
; CHECK-NEXT: i32.and $push[[NUM1:[0-9]+]]=, $0, $pop[[NUM0]]{{$}}
; CHECK-NEXT: call $push[[NUM2:[0-9]+]]=, z2s_func at FUNCTION, $pop[[NUM1]]{{$}}
@@ -42,8 +39,7 @@ define i32 @z2s_call(i32 %t) {
}
; CHECK-LABEL: s2z_call:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype s2z_call (i32) -> (i32){{$}}
; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 24{{$}}
; CHECK-NEXT: i32.shl $push[[NUM1:[0-9]+]]=, $0, $pop[[NUM0]]{{$}}
; CHECK-NEXT: i32.const $push[[NUM6:[0-9]+]]=, 24{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll Mon Nov 19 09:10:36 2018
@@ -19,8 +19,7 @@ target triple = "wasm32-unknown-unknown"
; ==============================================================================
; CHECK-LABEL: add_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.add $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @add_v16i8(<16 x i8> %x, <16 x i8> %y) {
@@ -30,8 +29,7 @@ define <16 x i8> @add_v16i8(<16 x i8> %x
; CHECK-LABEL: sub_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.sub $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) {
@@ -41,8 +39,7 @@ define <16 x i8> @sub_v16i8(<16 x i8> %x
; CHECK-LABEL: mul_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype mul_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.mul $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) {
@@ -52,8 +49,7 @@ define <16 x i8> @mul_v16i8(<16 x i8> %x
; CHECK-LABEL: neg_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype neg_v16i8 (v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.neg $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @neg_v16i8(<16 x i8> %x) {
@@ -65,8 +61,7 @@ define <16 x i8> @neg_v16i8(<16 x i8> %x
; CHECK-LABEL: shl_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_v16i8 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i8x16.shl $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @shl_v16i8(<16 x i8> %v, i8 %x) {
@@ -80,8 +75,7 @@ define <16 x i8> @shl_v16i8(<16 x i8> %v
; CHECK-LABEL: shl_const_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_const_v16i8 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5
; SIMD128-NEXT: i8x16.shl $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -94,8 +88,7 @@ define <16 x i8> @shl_const_v16i8(<16 x
; CHECK-LABEL: shl_vec_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_vec_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i32.shl $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -113,8 +106,7 @@ define <16 x i8> @shl_vec_v16i8(<16 x i8
; CHECK-LABEL: shr_s_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_v16i8 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i8x16.shr_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @shr_s_v16i8(<16 x i8> %v, i8 %x) {
@@ -128,8 +120,7 @@ define <16 x i8> @shr_s_v16i8(<16 x i8>
; CHECK-LABEL: shr_s_vec_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_vec_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 24{{$}}
; SIMD128-NEXT: i32.shl $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -155,8 +146,7 @@ define <16 x i8> @shr_s_vec_v16i8(<16 x
; CHECK-LABEL: shr_u_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_v16i8 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i8x16.shr_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @shr_u_v16i8(<16 x i8> %v, i8 %x) {
@@ -170,8 +160,7 @@ define <16 x i8> @shr_u_v16i8(<16 x i8>
; CHECK-LABEL: shr_u_vec_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_vec_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i32.shr_u $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -189,8 +178,7 @@ define <16 x i8> @shr_u_vec_v16i8(<16 x
; CHECK-LABEL: and_v16i8:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype and_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @and_v16i8(<16 x i8> %x, <16 x i8> %y) {
@@ -200,8 +188,7 @@ define <16 x i8> @and_v16i8(<16 x i8> %x
; CHECK-LABEL: or_v16i8:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype or_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @or_v16i8(<16 x i8> %x, <16 x i8> %y) {
@@ -211,8 +198,7 @@ define <16 x i8> @or_v16i8(<16 x i8> %x,
; CHECK-LABEL: xor_v16i8:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype xor_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.xor $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @xor_v16i8(<16 x i8> %x, <16 x i8> %y) {
@@ -222,8 +208,7 @@ define <16 x i8> @xor_v16i8(<16 x i8> %x
; CHECK-LABEL: not_v16i8:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype not_v16i8 (v128) -> (v128){{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @not_v16i8(<16 x i8> %x) {
@@ -236,8 +221,7 @@ define <16 x i8> @not_v16i8(<16 x i8> %x
; CHECK-LABEL: bitselect_v16i8:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v16i8 (v128, v128, v128) -> (v128){{$}}
; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
; SIMD128-FAST-NEXT: v128.and
@@ -260,8 +244,7 @@ define <16 x i8> @bitselect_v16i8(<16 x
; ==============================================================================
; CHECK-LABEL: add_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.add $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @add_v8i16(<8 x i16> %x, <8 x i16> %y) {
@@ -271,8 +254,7 @@ define <8 x i16> @add_v8i16(<8 x i16> %x
; CHECK-LABEL: sub_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.sub $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @sub_v8i16(<8 x i16> %x, <8 x i16> %y) {
@@ -282,8 +264,7 @@ define <8 x i16> @sub_v8i16(<8 x i16> %x
; CHECK-LABEL: mul_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype mul_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.mul $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @mul_v8i16(<8 x i16> %x, <8 x i16> %y) {
@@ -293,8 +274,7 @@ define <8 x i16> @mul_v8i16(<8 x i16> %x
; CHECK-LABEL: neg_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype neg_v8i16 (v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.neg $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @neg_v8i16(<8 x i16> %x) {
@@ -305,8 +285,7 @@ define <8 x i16> @neg_v8i16(<8 x i16> %x
; CHECK-LABEL: shl_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_v8i16 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i16x8.shl $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @shl_v8i16(<8 x i16> %v, i16 %x) {
@@ -319,8 +298,7 @@ define <8 x i16> @shl_v8i16(<8 x i16> %v
; CHECK-LABEL: shl_const_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_const_v8i16 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5
; SIMD128-NEXT: i16x8.shl $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -332,8 +310,7 @@ define <8 x i16> @shl_const_v8i16(<8 x i
; CHECK-LABEL: shl_vec_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_vec_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i32.shl $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -351,8 +328,7 @@ define <8 x i16> @shl_vec_v8i16(<8 x i16
; CHECK-LABEL: shr_s_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_v8i16 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i16x8.shr_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @shr_s_v8i16(<8 x i16> %v, i16 %x) {
@@ -365,8 +341,7 @@ define <8 x i16> @shr_s_v8i16(<8 x i16>
; CHECK-LABEL: shr_s_vec_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_vec_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.shl $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -392,8 +367,7 @@ define <8 x i16> @shr_s_vec_v8i16(<8 x i
; CHECK-LABEL: shr_u_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_v8i16 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i16x8.shr_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @shr_u_v8i16(<8 x i16> %v, i16 %x) {
@@ -406,8 +380,7 @@ define <8 x i16> @shr_u_v8i16(<8 x i16>
; CHECK-LABEL: shr_u_vec_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_vec_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i32.shr_u $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -425,8 +398,7 @@ define <8 x i16> @shr_u_vec_v8i16(<8 x i
; CHECK-LABEL: and_v8i16:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype and_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @and_v8i16(<8 x i16> %x, <8 x i16> %y) {
@@ -436,8 +408,7 @@ define <8 x i16> @and_v8i16(<8 x i16> %x
; CHECK-LABEL: or_v8i16:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype or_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @or_v8i16(<8 x i16> %x, <8 x i16> %y) {
@@ -447,8 +418,7 @@ define <8 x i16> @or_v8i16(<8 x i16> %x,
; CHECK-LABEL: xor_v8i16:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype xor_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.xor $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @xor_v8i16(<8 x i16> %x, <8 x i16> %y) {
@@ -458,8 +428,7 @@ define <8 x i16> @xor_v8i16(<8 x i16> %x
; CHECK-LABEL: not_v8i16:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype not_v8i16 (v128) -> (v128){{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @not_v8i16(<8 x i16> %x) {
@@ -470,8 +439,7 @@ define <8 x i16> @not_v8i16(<8 x i16> %x
; CHECK-LABEL: bitselect_v8i16:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v8i16 (v128, v128, v128) -> (v128){{$}}
; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
; SIMD128-FAST-NEXT: v128.and
@@ -494,8 +462,7 @@ define <8 x i16> @bitselect_v8i16(<8 x i
; ==============================================================================
; CHECK-LABEL: add_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.add $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @add_v4i32(<4 x i32> %x, <4 x i32> %y) {
@@ -505,8 +472,7 @@ define <4 x i32> @add_v4i32(<4 x i32> %x
; CHECK-LABEL: sub_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.sub $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @sub_v4i32(<4 x i32> %x, <4 x i32> %y) {
@@ -516,8 +482,7 @@ define <4 x i32> @sub_v4i32(<4 x i32> %x
; CHECK-LABEL: mul_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype mul_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.mul $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @mul_v4i32(<4 x i32> %x, <4 x i32> %y) {
@@ -527,8 +492,7 @@ define <4 x i32> @mul_v4i32(<4 x i32> %x
; CHECK-LABEL: neg_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype neg_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.neg $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @neg_v4i32(<4 x i32> %x) {
@@ -538,8 +502,7 @@ define <4 x i32> @neg_v4i32(<4 x i32> %x
; CHECK-LABEL: shl_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_v4i32 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i32x4.shl $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @shl_v4i32(<4 x i32> %v, i32 %x) {
@@ -552,8 +515,7 @@ define <4 x i32> @shl_v4i32(<4 x i32> %v
; CHECK-LABEL: shl_const_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_const_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5
; SIMD128-NEXT: i32x4.shl $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -564,8 +526,7 @@ define <4 x i32> @shl_const_v4i32(<4 x i
; CHECK-LABEL: shl_vec_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_vec_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.extract_lane $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i32x4.extract_lane $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i32.shl $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -583,8 +544,7 @@ define <4 x i32> @shl_vec_v4i32(<4 x i32
; CHECK-LABEL: shr_s_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_v4i32 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i32x4.shr_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @shr_s_v4i32(<4 x i32> %v, i32 %x) {
@@ -597,8 +557,7 @@ define <4 x i32> @shr_s_v4i32(<4 x i32>
; CHECK-LABEL: shr_s_vec_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_vec_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.extract_lane $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i32x4.extract_lane $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i32.shr_s $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -616,8 +575,7 @@ define <4 x i32> @shr_s_vec_v4i32(<4 x i
; CHECK-LABEL: shr_u_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_v4i32 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i32x4.shr_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @shr_u_v4i32(<4 x i32> %v, i32 %x) {
@@ -630,8 +588,7 @@ define <4 x i32> @shr_u_v4i32(<4 x i32>
; CHECK-LABEL: shr_u_vec_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_vec_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.extract_lane $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i32x4.extract_lane $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i32.shr_u $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -649,8 +606,7 @@ define <4 x i32> @shr_u_vec_v4i32(<4 x i
; CHECK-LABEL: and_v4i32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype and_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @and_v4i32(<4 x i32> %x, <4 x i32> %y) {
@@ -660,8 +616,7 @@ define <4 x i32> @and_v4i32(<4 x i32> %x
; CHECK-LABEL: or_v4i32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype or_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @or_v4i32(<4 x i32> %x, <4 x i32> %y) {
@@ -671,8 +626,7 @@ define <4 x i32> @or_v4i32(<4 x i32> %x,
; CHECK-LABEL: xor_v4i32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype xor_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.xor $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @xor_v4i32(<4 x i32> %x, <4 x i32> %y) {
@@ -682,8 +636,7 @@ define <4 x i32> @xor_v4i32(<4 x i32> %x
; CHECK-LABEL: not_v4i32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype not_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @not_v4i32(<4 x i32> %x) {
@@ -693,8 +646,7 @@ define <4 x i32> @not_v4i32(<4 x i32> %x
; CHECK-LABEL: bitselect_v4i32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v4i32 (v128, v128, v128) -> (v128){{$}}
; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
; SIMD128-FAST-NEXT: v128.not
@@ -716,8 +668,7 @@ define <4 x i32> @bitselect_v4i32(<4 x i
; CHECK-LABEL: add_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.add $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @add_v2i64(<2 x i64> %x, <2 x i64> %y) {
@@ -728,8 +679,7 @@ define <2 x i64> @add_v2i64(<2 x i64> %x
; CHECK-LABEL: sub_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.sub $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @sub_v2i64(<2 x i64> %x, <2 x i64> %y) {
@@ -751,8 +701,7 @@ define <2 x i64> @mul_v2i64(<2 x i64> %x
; CHECK-LABEL: neg_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype neg_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.neg $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @neg_v2i64(<2 x i64> %x) {
@@ -762,8 +711,7 @@ define <2 x i64> @neg_v2i64(<2 x i64> %x
; CHECK-LABEL: shl_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_v2i64 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i64x2.shl $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @shl_v2i64(<2 x i64> %v, i32 %x) {
@@ -776,8 +724,7 @@ define <2 x i64> @shl_v2i64(<2 x i64> %v
; CHECK-LABEL: shl_nozext_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, i64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_nozext_v2i64 (v128, i64) -> (v128){{$}}
; SIMD128-NEXT: i32.wrap/i64 $push[[L0:[0-9]+]]=, $1{{$}}
; SIMD128-NEXT: i64x2.shl $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -790,8 +737,7 @@ define <2 x i64> @shl_nozext_v2i64(<2 x
; CHECK-LABEL: shl_const_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_const_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5{{$}}
; SIMD128-NEXT: i64x2.shl $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -802,8 +748,7 @@ define <2 x i64> @shl_const_v2i64(<2 x i
; CHECK-LABEL: shl_vec_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shl_vec_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.extract_lane $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i64x2.extract_lane $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i64.shl $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -820,8 +765,7 @@ define <2 x i64> @shl_vec_v2i64(<2 x i64
; CHECK-LABEL: shr_s_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_v2i64 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i64x2.shr_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @shr_s_v2i64(<2 x i64> %v, i32 %x) {
@@ -834,8 +778,7 @@ define <2 x i64> @shr_s_v2i64(<2 x i64>
; CHECK-LABEL: shr_s_nozext_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, i64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_nozext_v2i64 (v128, i64) -> (v128){{$}}
; SIMD128-NEXT: i32.wrap/i64 $push[[L0:[0-9]+]]=, $1{{$}}
; SIMD128-NEXT: i64x2.shr_s $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -848,8 +791,7 @@ define <2 x i64> @shr_s_nozext_v2i64(<2
; CHECK-LABEL: shr_s_const_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_const_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5{{$}}
; SIMD128-NEXT: i64x2.shr_s $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -860,8 +802,7 @@ define <2 x i64> @shr_s_const_v2i64(<2 x
; CHECK-LABEL: shr_s_vec_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_s_vec_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.extract_lane $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i64x2.extract_lane $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i64.shr_s $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -878,8 +819,7 @@ define <2 x i64> @shr_s_vec_v2i64(<2 x i
; CHECK-LABEL: shr_u_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_v2i64 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i64x2.shr_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @shr_u_v2i64(<2 x i64> %v, i32 %x) {
@@ -892,8 +832,7 @@ define <2 x i64> @shr_u_v2i64(<2 x i64>
; CHECK-LABEL: shr_u_nozext_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, i64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_nozext_v2i64 (v128, i64) -> (v128){{$}}
; SIMD128-NEXT: i32.wrap/i64 $push[[L0:[0-9]+]]=, $1{{$}}
; SIMD128-NEXT: i64x2.shr_u $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -906,8 +845,7 @@ define <2 x i64> @shr_u_nozext_v2i64(<2
; CHECK-LABEL: shr_u_const_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_const_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5{{$}}
; SIMD128-NEXT: i64x2.shr_u $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -918,8 +856,7 @@ define <2 x i64> @shr_u_const_v2i64(<2 x
; CHECK-LABEL: shr_u_vec_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shr_u_vec_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.extract_lane $push[[L0:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: i64x2.extract_lane $push[[L1:[0-9]+]]=, $1, 0{{$}}
; SIMD128-NEXT: i64.shr_u $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -937,8 +874,7 @@ define <2 x i64> @shr_u_vec_v2i64(<2 x i
; CHECK-LABEL: and_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype and_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @and_v2i64(<2 x i64> %x, <2 x i64> %y) {
@@ -949,8 +885,7 @@ define <2 x i64> @and_v2i64(<2 x i64> %x
; CHECK-LABEL: or_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype or_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @or_v2i64(<2 x i64> %x, <2 x i64> %y) {
@@ -961,8 +896,7 @@ define <2 x i64> @or_v2i64(<2 x i64> %x,
; CHECK-LABEL: xor_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype xor_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.xor $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @xor_v2i64(<2 x i64> %x, <2 x i64> %y) {
@@ -973,8 +907,7 @@ define <2 x i64> @xor_v2i64(<2 x i64> %x
; CHECK-LABEL: not_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype not_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @not_v2i64(<2 x i64> %x) {
@@ -985,8 +918,7 @@ define <2 x i64> @not_v2i64(<2 x i64> %x
; CHECK-LABEL: bitselect_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v2i64 (v128, v128, v128) -> (v128){{$}}
; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
; SIMD128-FAST-NEXT: v128.not
@@ -1007,8 +939,7 @@ define <2 x i64> @bitselect_v2i64(<2 x i
; ==============================================================================
; CHECK-LABEL: neg_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype neg_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.neg $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @neg_v4f32(<4 x float> %x) {
@@ -1019,8 +950,7 @@ define <4 x float> @neg_v4f32(<4 x float
; CHECK-LABEL: abs_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype abs_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.abs $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) nounwind readnone
@@ -1031,8 +961,7 @@ define <4 x float> @abs_v4f32(<4 x float
; CHECK-LABEL: min_unordered_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype min_unordered_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32.const $push[[L0:[0-9]+]]=, 0x1.4p2
; SIMD128-NEXT: f32x4.splat $push[[L1:[0-9]+]]=, $pop[[L0]]
; SIMD128-NEXT: f32x4.min $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
@@ -1046,8 +975,7 @@ define <4 x float> @min_unordered_v4f32(
; CHECK-LABEL: max_unordered_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype max_unordered_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32.const $push[[L0:[0-9]+]]=, 0x1.4p2
; SIMD128-NEXT: f32x4.splat $push[[L1:[0-9]+]]=, $pop[[L0]]
; SIMD128-NEXT: f32x4.max $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
@@ -1061,8 +989,7 @@ define <4 x float> @max_unordered_v4f32(
; CHECK-LABEL: min_ordered_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype min_ordered_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32.const $push[[L0:[0-9]+]]=, 0x1.4p2
; SIMD128-NEXT: f32x4.splat $push[[L1:[0-9]+]]=, $pop[[L0]]
; SIMD128-NEXT: f32x4.min $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
@@ -1076,8 +1003,7 @@ define <4 x float> @min_ordered_v4f32(<4
; CHECK-LABEL: max_ordered_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype max_ordered_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32.const $push[[L0:[0-9]+]]=, 0x1.4p2
; SIMD128-NEXT: f32x4.splat $push[[L1:[0-9]+]]=, $pop[[L0]]
; SIMD128-NEXT: f32x4.max $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
@@ -1091,8 +1017,7 @@ define <4 x float> @max_ordered_v4f32(<4
; CHECK-LABEL: min_intrinsic_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype min_intrinsic_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.min $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x float> @llvm.minimum.v4f32(<4 x float>, <4 x float>)
@@ -1103,8 +1028,7 @@ define <4 x float> @min_intrinsic_v4f32(
; CHECK-LABEL: max_intrinsic_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype max_intrinsic_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.max $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x float> @llvm.maximum.v4f32(<4 x float>, <4 x float>)
@@ -1115,7 +1039,7 @@ define <4 x float> @max_intrinsic_v4f32(
; CHECK-LABEL: min_const_intrinsic_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype min_const_intrinsic_v4f32 () -> (v128){{$}}
; SIMD128-NEXT: f32.const $push[[L:[0-9]+]]=, 0x1.4p2{{$}}
; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $pop[[L]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1129,7 +1053,7 @@ define <4 x float> @min_const_intrinsic_
; CHECK-LABEL: max_const_intrinsic_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype max_const_intrinsic_v4f32 () -> (v128){{$}}
; SIMD128-NEXT: f32.const $push[[L:[0-9]+]]=, 0x1.5p5{{$}}
; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $pop[[L]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1143,8 +1067,7 @@ define <4 x float> @max_const_intrinsic_
; CHECK-LABEL: add_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.add $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @add_v4f32(<4 x float> %x, <4 x float> %y) {
@@ -1154,8 +1077,7 @@ define <4 x float> @add_v4f32(<4 x float
; CHECK-LABEL: sub_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.sub $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @sub_v4f32(<4 x float> %x, <4 x float> %y) {
@@ -1165,8 +1087,7 @@ define <4 x float> @sub_v4f32(<4 x float
; CHECK-LABEL: div_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype div_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.div $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @div_v4f32(<4 x float> %x, <4 x float> %y) {
@@ -1176,8 +1097,7 @@ define <4 x float> @div_v4f32(<4 x float
; CHECK-LABEL: mul_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype mul_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.mul $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) {
@@ -1187,8 +1107,7 @@ define <4 x float> @mul_v4f32(<4 x float
; CHECK-LABEL: sqrt_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sqrt_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.sqrt $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
@@ -1202,8 +1121,7 @@ define <4 x float> @sqrt_v4f32(<4 x floa
; ==============================================================================
; CHECK-LABEL: neg_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype neg_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.neg $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @neg_v2f64(<2 x double> %x) {
@@ -1214,8 +1132,7 @@ define <2 x double> @neg_v2f64(<2 x doub
; CHECK-LABEL: abs_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype abs_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.abs $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <2 x double> @llvm.fabs.v2f64(<2 x double>) nounwind readnone
@@ -1226,8 +1143,7 @@ define <2 x double> @abs_v2f64(<2 x doub
; CHECK-LABEL: min_unordered_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype min_unordered_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64.const $push[[L0:[0-9]+]]=, 0x1.4p2
; SIMD128-NEXT: f64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]
; SIMD128-NEXT: f64x2.min $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
@@ -1241,8 +1157,7 @@ define <2 x double> @min_unordered_v2f64
; CHECK-LABEL: max_unordered_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype max_unordered_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64.const $push[[L0:[0-9]+]]=, 0x1.4p2
; SIMD128-NEXT: f64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]
; SIMD128-NEXT: f64x2.max $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
@@ -1256,8 +1171,7 @@ define <2 x double> @max_unordered_v2f64
; CHECK-LABEL: min_ordered_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype min_ordered_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64.const $push[[L0:[0-9]+]]=, 0x1.4p2
; SIMD128-NEXT: f64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]
; SIMD128-NEXT: f64x2.min $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
@@ -1271,8 +1185,7 @@ define <2 x double> @min_ordered_v2f64(<
; CHECK-LABEL: max_ordered_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype max_ordered_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64.const $push[[L0:[0-9]+]]=, 0x1.4p2
; SIMD128-NEXT: f64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]
; SIMD128-NEXT: f64x2.max $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
@@ -1286,8 +1199,7 @@ define <2 x double> @max_ordered_v2f64(<
; CHECK-LABEL: min_intrinsic_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype min_intrinsic_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.min $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <2 x double> @llvm.minimum.v2f64(<2 x double>, <2 x double>)
@@ -1298,8 +1210,7 @@ define <2 x double> @min_intrinsic_v2f64
; CHECK-LABEL: max_intrinsic_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype max_intrinsic_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.max $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <2 x double> @llvm.maximum.v2f64(<2 x double>, <2 x double>)
@@ -1310,7 +1221,7 @@ define <2 x double> @max_intrinsic_v2f64
; CHECK-LABEL: min_const_intrinsic_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype min_const_intrinsic_v2f64 () -> (v128){{$}}
; SIMD128-NEXT: f64.const $push[[L:[0-9]+]]=, 0x1.4p2{{$}}
; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $pop[[L]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1324,7 +1235,7 @@ define <2 x double> @min_const_intrinsic
; CHECK-LABEL: max_const_intrinsic_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype max_const_intrinsic_v2f64 () -> (v128){{$}}
; SIMD128-NEXT: f64.const $push[[L:[0-9]+]]=, 0x1.5p5{{$}}
; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $pop[[L]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1339,8 +1250,7 @@ define <2 x double> @max_const_intrinsic
; CHECK-LABEL: add_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f62x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.add $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @add_v2f64(<2 x double> %x, <2 x double> %y) {
@@ -1351,8 +1261,7 @@ define <2 x double> @add_v2f64(<2 x doub
; CHECK-LABEL: sub_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f62x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.sub $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @sub_v2f64(<2 x double> %x, <2 x double> %y) {
@@ -1363,8 +1272,7 @@ define <2 x double> @sub_v2f64(<2 x doub
; CHECK-LABEL: div_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f62x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype div_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.div $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @div_v2f64(<2 x double> %x, <2 x double> %y) {
@@ -1375,8 +1283,7 @@ define <2 x double> @div_v2f64(<2 x doub
; CHECK-LABEL: mul_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f62x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype mul_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.mul $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @mul_v2f64(<2 x double> %x, <2 x double> %y) {
@@ -1386,8 +1293,7 @@ define <2 x double> @mul_v2f64(<2 x doub
; CHECK-LABEL: sqrt_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sqrt_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.sqrt $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <2 x double> @llvm.sqrt.v2f64(<2 x double> %x)
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-comparisons.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-comparisons.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-comparisons.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-comparisons.ll Mon Nov 19 09:10:36 2018
@@ -9,8 +9,7 @@ target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: compare_eq_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_eq_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -20,8 +19,7 @@ define <16 x i1> @compare_eq_v16i8 (<16
; CHECK-LABEL: compare_sext_eq_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_eq_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -32,8 +30,7 @@ define <16 x i8> @compare_sext_eq_v16i8
; CHECK-LABEL: compare_ne_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ne_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -43,8 +40,7 @@ define <16 x i1> @compare_ne_v16i8 (<16
; CHECK-LABEL: compare_sext_ne_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ne_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -55,8 +51,7 @@ define <16 x i8> @compare_sext_ne_v16i8
; CHECK-LABEL: compare_slt_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_slt_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -66,8 +61,7 @@ define <16 x i1> @compare_slt_v16i8 (<16
; CHECK-LABEL: compare_sext_slt_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_slt_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -78,8 +72,7 @@ define <16 x i8> @compare_sext_slt_v16i8
; CHECK-LABEL: compare_ult_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ult_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -89,8 +82,7 @@ define <16 x i1> @compare_ult_v16i8 (<16
; CHECK-LABEL: compare_sext_ult_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ult_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -101,8 +93,7 @@ define <16 x i8> @compare_sext_ult_v16i8
; CHECK-LABEL: compare_sle_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sle_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -112,8 +103,7 @@ define <16 x i1> @compare_sle_v16i8 (<16
; CHECK-LABEL: compare_sext_sle_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sle_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -124,8 +114,7 @@ define <16 x i8> @compare_sext_sle_v16i8
; CHECK-LABEL: compare_ule_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ule_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -135,8 +124,7 @@ define <16 x i1> @compare_ule_v16i8 (<16
; CHECK-LABEL: compare_sext_ule_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ule_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -147,8 +135,7 @@ define <16 x i8> @compare_sext_ule_v16i8
; CHECK-LABEL: compare_sgt_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sgt_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -158,8 +145,7 @@ define <16 x i1> @compare_sgt_v16i8 (<16
; CHECK-LABEL: compare_sext_sgt_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sgt_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -170,8 +156,7 @@ define <16 x i8> @compare_sext_sgt_v16i8
; CHECK-LABEL: compare_ugt_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ugt_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -181,8 +166,7 @@ define <16 x i1> @compare_ugt_v16i8 (<16
; CHECK-LABEL: compare_sext_ugt_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ugt_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -193,8 +177,7 @@ define <16 x i8> @compare_sext_ugt_v16i8
; CHECK-LABEL: compare_sge_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sge_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -204,8 +187,7 @@ define <16 x i1> @compare_sge_v16i8 (<16
; CHECK-LABEL: compare_sext_sge_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sge_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -216,8 +198,7 @@ define <16 x i8> @compare_sext_sge_v16i8
; CHECK-LABEL: compare_uge_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_uge_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i1> @compare_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -227,8 +208,7 @@ define <16 x i1> @compare_uge_v16i8 (<16
; CHECK-LABEL: compare_sext_uge_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_uge_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @compare_sext_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
@@ -239,8 +219,7 @@ define <16 x i8> @compare_sext_uge_v16i8
; CHECK-LABEL: compare_eq_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_eq_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -250,8 +229,7 @@ define <8 x i1> @compare_eq_v8i16 (<8 x
; CHECK-LABEL: compare_sext_eq_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_eq_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -262,8 +240,7 @@ define <8 x i16> @compare_sext_eq_v8i16
; CHECK-LABEL: compare_ne_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ne_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -273,8 +250,7 @@ define <8 x i1> @compare_ne_v8i16 (<8 x
; CHECK-LABEL: compare_sext_ne_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ne_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -285,8 +261,7 @@ define <8 x i16> @compare_sext_ne_v8i16
; CHECK-LABEL: compare_slt_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_slt_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -296,8 +271,7 @@ define <8 x i1> @compare_slt_v8i16 (<8 x
; CHECK-LABEL: compare_sext_slt_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_slt_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -308,8 +282,7 @@ define <8 x i16> @compare_sext_slt_v8i16
; CHECK-LABEL: compare_ult_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ult_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -319,8 +292,7 @@ define <8 x i1> @compare_ult_v8i16 (<8 x
; CHECK-LABEL: compare_sext_ult_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ult_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -331,8 +303,7 @@ define <8 x i16> @compare_sext_ult_v8i16
; CHECK-LABEL: compare_sle_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sle_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -342,8 +313,7 @@ define <8 x i1> @compare_sle_v8i16 (<8 x
; CHECK-LABEL: compare_sext_sle_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sle_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -354,8 +324,7 @@ define <8 x i16> @compare_sext_sle_v8i16
; CHECK-LABEL: compare_ule_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ule_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -365,8 +334,7 @@ define <8 x i1> @compare_ule_v8i16 (<8 x
; CHECK-LABEL: compare_sext_ule_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ule_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -377,8 +345,7 @@ define <8 x i16> @compare_sext_ule_v8i16
; CHECK-LABEL: compare_sgt_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sgt_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -388,8 +355,7 @@ define <8 x i1> @compare_sgt_v8i16 (<8 x
; CHECK-LABEL: compare_sext_sgt_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sgt_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -400,8 +366,7 @@ define <8 x i16> @compare_sext_sgt_v8i16
; CHECK-LABEL: compare_ugt_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ugt_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -411,8 +376,7 @@ define <8 x i1> @compare_ugt_v8i16 (<8 x
; CHECK-LABEL: compare_sext_ugt_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ugt_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -423,8 +387,7 @@ define <8 x i16> @compare_sext_ugt_v8i16
; CHECK-LABEL: compare_sge_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sge_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -434,8 +397,7 @@ define <8 x i1> @compare_sge_v8i16 (<8 x
; CHECK-LABEL: compare_sext_sge_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sge_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -446,8 +408,7 @@ define <8 x i16> @compare_sext_sge_v8i16
; CHECK-LABEL: compare_uge_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_uge_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i1> @compare_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -457,8 +418,7 @@ define <8 x i1> @compare_uge_v8i16 (<8 x
; CHECK-LABEL: compare_sext_uge_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_uge_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @compare_sext_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
@@ -469,8 +429,7 @@ define <8 x i16> @compare_sext_uge_v8i16
; CHECK-LABEL: compare_eq_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_eq_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -480,8 +439,7 @@ define <4 x i1> @compare_eq_v4i32 (<4 x
; CHECK-LABEL: compare_sext_eq_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_eq_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -492,8 +450,7 @@ define <4 x i32> @compare_sext_eq_v4i32
; CHECK-LABEL: compare_ne_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ne_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -503,8 +460,7 @@ define <4 x i1> @compare_ne_v4i32 (<4 x
; CHECK-LABEL: compare_sext_ne_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ne_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -515,8 +471,7 @@ define <4 x i32> @compare_sext_ne_v4i32
; CHECK-LABEL: compare_slt_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_slt_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -526,8 +481,7 @@ define <4 x i1> @compare_slt_v4i32 (<4 x
; CHECK-LABEL: compare_sext_slt_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_slt_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -538,8 +492,7 @@ define <4 x i32> @compare_sext_slt_v4i32
; CHECK-LABEL: compare_ult_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ult_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -549,8 +502,7 @@ define <4 x i1> @compare_ult_v4i32 (<4 x
; CHECK-LABEL: compare_sext_ult_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ult_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -561,8 +513,7 @@ define <4 x i32> @compare_sext_ult_v4i32
; CHECK-LABEL: compare_sle_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sle_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -572,8 +523,7 @@ define <4 x i1> @compare_sle_v4i32 (<4 x
; CHECK-LABEL: compare_sext_sle_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sle_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -584,8 +534,7 @@ define <4 x i32> @compare_sext_sle_v4i32
; CHECK-LABEL: compare_ule_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ule_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -595,8 +544,7 @@ define <4 x i1> @compare_ule_v4i32 (<4 x
; CHECK-LABEL: compare_sext_ule_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ule_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -607,8 +555,7 @@ define <4 x i32> @compare_sext_ule_v4i32
; CHECK-LABEL: compare_sgt_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sgt_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -618,8 +565,7 @@ define <4 x i1> @compare_sgt_v4i32 (<4 x
; CHECK-LABEL: compare_sext_sgt_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sgt_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -630,8 +576,7 @@ define <4 x i32> @compare_sext_sgt_v4i32
; CHECK-LABEL: compare_ugt_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ugt_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -641,8 +586,7 @@ define <4 x i1> @compare_ugt_v4i32 (<4 x
; CHECK-LABEL: compare_sext_ugt_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ugt_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -653,8 +597,7 @@ define <4 x i32> @compare_sext_ugt_v4i32
; CHECK-LABEL: compare_sge_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sge_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -664,8 +607,7 @@ define <4 x i1> @compare_sge_v4i32 (<4 x
; CHECK-LABEL: compare_sext_sge_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_sge_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -676,8 +618,7 @@ define <4 x i32> @compare_sext_sge_v4i32
; CHECK-LABEL: compare_uge_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_uge_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -687,8 +628,7 @@ define <4 x i1> @compare_uge_v4i32 (<4 x
; CHECK-LABEL: compare_sext_uge_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_uge_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
@@ -699,8 +639,7 @@ define <4 x i32> @compare_sext_uge_v4i32
; CHECK-LABEL: compare_oeq_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_oeq_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_oeq_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -710,8 +649,7 @@ define <4 x i1> @compare_oeq_v4f32 (<4 x
; CHECK-LABEL: compare_sext_oeq_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_oeq_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_oeq_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -722,8 +660,7 @@ define <4 x i32> @compare_sext_oeq_v4f32
; CHECK-LABEL: compare_ogt_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ogt_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_ogt_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -733,8 +670,7 @@ define <4 x i1> @compare_ogt_v4f32 (<4 x
; CHECK-LABEL: compare_sext_ogt_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ogt_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_ogt_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -745,8 +681,7 @@ define <4 x i32> @compare_sext_ogt_v4f32
; CHECK-LABEL: compare_oge_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_oge_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_oge_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -756,8 +691,7 @@ define <4 x i1> @compare_oge_v4f32 (<4 x
; CHECK-LABEL: compare_sext_oge_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_oge_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_oge_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -768,8 +702,7 @@ define <4 x i32> @compare_sext_oge_v4f32
; CHECK-LABEL: compare_olt_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_olt_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_olt_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -779,8 +712,7 @@ define <4 x i1> @compare_olt_v4f32 (<4 x
; CHECK-LABEL: compare_sext_olt_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_olt_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_olt_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -791,8 +723,7 @@ define <4 x i32> @compare_sext_olt_v4f32
; CHECK-LABEL: compare_ole_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ole_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_ole_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -802,8 +733,7 @@ define <4 x i1> @compare_ole_v4f32 (<4 x
; CHECK-LABEL: compare_sext_ole_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ole_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_ole_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -814,8 +744,7 @@ define <4 x i32> @compare_sext_ole_v4f32
; CHECK-LABEL: compare_one_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_one_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f32x4.eq $push[[T2:[0-9]+]]=, $1, $1{{$}}
@@ -829,8 +758,7 @@ define <4 x i1> @compare_one_v4f32 (<4 x
; CHECK-LABEL: compare_sext_one_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_one_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f32x4.eq $push[[T2:[0-9]+]]=, $1, $1{{$}}
@@ -845,8 +773,7 @@ define <4 x i32> @compare_sext_one_v4f32
; CHECK-LABEL: compare_ord_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ord_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
@@ -858,8 +785,7 @@ define <4 x i1> @compare_ord_v4f32 (<4 x
; CHECK-LABEL: compare_sext_ord_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ord_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
@@ -872,8 +798,7 @@ define <4 x i32> @compare_sext_ord_v4f32
; CHECK-LABEL: compare_ueq_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ueq_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f32x4.ne $push[[T2:[0-9]+]]=, $1, $1{{$}}
@@ -887,8 +812,7 @@ define <4 x i1> @compare_ueq_v4f32 (<4 x
; CHECK-LABEL: compare_sext_ueq_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ueq_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f32x4.ne $push[[T2:[0-9]+]]=, $1, $1{{$}}
@@ -903,8 +827,7 @@ define <4 x i32> @compare_sext_ueq_v4f32
; CHECK-LABEL: compare_ugt_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ugt_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -915,8 +838,7 @@ define <4 x i1> @compare_ugt_v4f32 (<4 x
; CHECK-LABEL: compare_sext_ugt_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ugt_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -928,8 +850,7 @@ define <4 x i32> @compare_sext_ugt_v4f32
; CHECK-LABEL: compare_uge_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_uge_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.lt $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -940,8 +861,7 @@ define <4 x i1> @compare_uge_v4f32 (<4 x
; CHECK-LABEL: compare_sext_uge_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_uge_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.lt $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -953,8 +873,7 @@ define <4 x i32> @compare_sext_uge_v4f32
; CHECK-LABEL: compare_ult_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ult_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ge $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -965,8 +884,7 @@ define <4 x i1> @compare_ult_v4f32 (<4 x
; CHECK-LABEL: compare_sext_ult_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ult_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ge $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -978,8 +896,7 @@ define <4 x i32> @compare_sext_ult_v4f32
; CHECK-LABEL: compare_ule_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ule_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -990,8 +907,7 @@ define <4 x i1> @compare_ule_v4f32 (<4 x
; CHECK-LABEL: compare_sext_ule_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ule_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1003,8 +919,7 @@ define <4 x i32> @compare_sext_ule_v4f32
; CHECK-LABEL: compare_une_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_une_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i1> @compare_une_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -1014,8 +929,7 @@ define <4 x i1> @compare_une_v4f32 (<4 x
; CHECK-LABEL: compare_sext_une_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_une_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @compare_sext_une_v4f32 (<4 x float> %x, <4 x float> %y) {
@@ -1026,8 +940,7 @@ define <4 x i32> @compare_sext_une_v4f32
; CHECK-LABEL: compare_uno_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_uno_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
@@ -1039,8 +952,7 @@ define <4 x i1> @compare_uno_v4f32 (<4 x
; CHECK-LABEL: compare_sext_uno_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_uno_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
@@ -1054,8 +966,7 @@ define <4 x i32> @compare_sext_uno_v4f32
; CHECK-LABEL: compare_oeq_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_oeq_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i1> @compare_oeq_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1066,8 +977,7 @@ define <2 x i1> @compare_oeq_v2f64 (<2 x
; CHECK-LABEL: compare_sext_oeq_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_oeq_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @compare_sext_oeq_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1079,8 +989,7 @@ define <2 x i64> @compare_sext_oeq_v2f64
; CHECK-LABEL: compare_ogt_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ogt_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i1> @compare_ogt_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1091,8 +1000,7 @@ define <2 x i1> @compare_ogt_v2f64 (<2 x
; CHECK-LABEL: compare_sext_ogt_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ogt_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @compare_sext_ogt_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1104,8 +1012,7 @@ define <2 x i64> @compare_sext_ogt_v2f64
; CHECK-LABEL: compare_oge_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_oge_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i1> @compare_oge_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1116,8 +1023,7 @@ define <2 x i1> @compare_oge_v2f64 (<2 x
; CHECK-LABEL: compare_sext_oge_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_oge_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @compare_sext_oge_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1129,8 +1035,7 @@ define <2 x i64> @compare_sext_oge_v2f64
; CHECK-LABEL: compare_olt_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_olt_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i1> @compare_olt_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1141,8 +1046,7 @@ define <2 x i1> @compare_olt_v2f64 (<2 x
; CHECK-LABEL: compare_sext_olt_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_olt_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @compare_sext_olt_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1154,8 +1058,7 @@ define <2 x i64> @compare_sext_olt_v2f64
; CHECK-LABEL: compare_ole_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ole_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i1> @compare_ole_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1166,8 +1069,7 @@ define <2 x i1> @compare_ole_v2f64 (<2 x
; CHECK-LABEL: compare_sext_ole_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ole_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @compare_sext_ole_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1179,8 +1081,7 @@ define <2 x i64> @compare_sext_ole_v2f64
; CHECK-LABEL: compare_one_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_one_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f64x2.eq $push[[T2:[0-9]+]]=, $1, $1{{$}}
@@ -1195,8 +1096,7 @@ define <2 x i1> @compare_one_v2f64 (<2 x
; CHECK-LABEL: compare_sext_one_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_one_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f64x2.eq $push[[T2:[0-9]+]]=, $1, $1{{$}}
@@ -1212,8 +1112,7 @@ define <2 x i64> @compare_sext_one_v2f64
; CHECK-LABEL: compare_ord_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ord_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
@@ -1226,8 +1125,7 @@ define <2 x i1> @compare_ord_v2f64 (<2 x
; CHECK-LABEL: compare_sext_ord_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ord_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
@@ -1241,8 +1139,7 @@ define <2 x i64> @compare_sext_ord_v2f64
; CHECK-LABEL: compare_ueq_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ueq_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f64x2.ne $push[[T2:[0-9]+]]=, $1, $1{{$}}
@@ -1257,8 +1154,7 @@ define <2 x i1> @compare_ueq_v2f64 (<2 x
; CHECK-LABEL: compare_sext_ueq_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ueq_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f64x2.ne $push[[T2:[0-9]+]]=, $1, $1{{$}}
@@ -1274,8 +1170,7 @@ define <2 x i64> @compare_sext_ueq_v2f64
; CHECK-LABEL: compare_ugt_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ugt_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1287,8 +1182,7 @@ define <2 x i1> @compare_ugt_v2f64 (<2 x
; CHECK-LABEL: compare_sext_ugt_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ugt_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1301,8 +1195,7 @@ define <2 x i64> @compare_sext_ugt_v2f64
; CHECK-LABEL: compare_uge_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_uge_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.lt $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1314,8 +1207,7 @@ define <2 x i1> @compare_uge_v2f64 (<2 x
; CHECK-LABEL: compare_sext_uge_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_uge_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.lt $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1328,8 +1220,7 @@ define <2 x i64> @compare_sext_uge_v2f64
; CHECK-LABEL: compare_ult_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ult_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ge $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1341,8 +1232,7 @@ define <2 x i1> @compare_ult_v2f64 (<2 x
; CHECK-LABEL: compare_sext_ult_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ult_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ge $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1355,8 +1245,7 @@ define <2 x i64> @compare_sext_ult_v2f64
; CHECK-LABEL: compare_ule_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_ule_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1368,8 +1257,7 @@ define <2 x i1> @compare_ule_v2f64 (<2 x
; CHECK-LABEL: compare_sext_ule_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_ule_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1382,8 +1270,7 @@ define <2 x i64> @compare_sext_ule_v2f64
; CHECK-LABEL: compare_une_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_une_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i1> @compare_une_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1394,8 +1281,7 @@ define <2 x i1> @compare_une_v2f64 (<2 x
; CHECK-LABEL: compare_sext_une_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_une_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @compare_sext_une_v2f64 (<2 x double> %x, <2 x double> %y) {
@@ -1407,8 +1293,7 @@ define <2 x i64> @compare_sext_une_v2f64
; CHECK-LABEL: compare_uno_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_uno_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
@@ -1421,8 +1306,7 @@ define <2 x i1> @compare_uno_v2f64 (<2 x
; CHECK-LABEL: compare_sext_uno_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype compare_sext_uno_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-conversions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-conversions.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-conversions.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-conversions.ll Mon Nov 19 09:10:36 2018
@@ -9,8 +9,7 @@ target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: convert_s_v4f32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype convert_s_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.convert_s/i32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
@@ -20,8 +19,7 @@ define <4 x float> @convert_s_v4f32(<4 x
; CHECK-LABEL: convert_u_v4f32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype convert_u_v4f32 (v128) -> (v128){{$}}
; SIMD128-NEXT: f32x4.convert_u/i32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
@@ -32,8 +30,7 @@ define <4 x float> @convert_u_v4f32(<4 x
; CHECK-LABEL: convert_s_v2f64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: f64x2.convert_s/i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype convert_s_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.convert_s/i64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
@@ -44,8 +41,7 @@ define <2 x double> @convert_s_v2f64(<2
; CHECK-LABEL: convert_u_v2f64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: f64x2.convert_u/i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype convert_u_v2f64 (v128) -> (v128){{$}}
; SIMD128-NEXT: f64x2.convert_u/i64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
@@ -55,8 +51,7 @@ define <2 x double> @convert_u_v2f64(<2
; CHECK-LABEL: trunc_sat_s_v4i32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype trunc_sat_s_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.trunc_sat_s/f32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
@@ -66,8 +61,7 @@ define <4 x i32> @trunc_sat_s_v4i32(<4 x
; CHECK-LABEL: trunc_sat_u_v4i32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype trunc_sat_u_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.trunc_sat_u/f32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
@@ -78,8 +72,7 @@ define <4 x i32> @trunc_sat_u_v4i32(<4 x
; CHECK-LABEL: trunc_sat_s_v2i64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: i64x2.trunc_sat_s/f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.trunc_sat_s/f64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
@@ -90,8 +83,7 @@ define <2 x i64> @trunc_sat_s_v2i64(<2 x
; CHECK-LABEL: trunc_sat_u_v2i64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: i64x2.trunc_sat_u/f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.trunc_sat_u/f64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-ext-load-trunc-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-ext-load-trunc-store.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-ext-load-trunc-store.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-ext-load-trunc-store.ll Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: load_ext_2xi32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_ext_2xi32 (i32) -> (v128){{$}}
; CHECK-NEXT: i64.load32_u $push[[L0:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]{{$}}
; CHECK-NEXT: i64.load32_u $push[[L2:[0-9]+]]=, 4($0){{$}}
@@ -20,8 +19,7 @@ define <2 x i32> @load_ext_2xi32(<2 x i3
}
; CHECK-LABEL: load_zext_2xi32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_zext_2xi32 (i32) -> (v128){{$}}
; CHECK-NEXT: i64.load32_u $push[[L0:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]{{$}}
; CHECK-NEXT: i64.load32_u $push[[L2:[0-9]+]]=, 4($0){{$}}
@@ -34,8 +32,7 @@ define <2 x i64> @load_zext_2xi32(<2 x i
}
; CHECK-LABEL: load_sext_2xi32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_sext_2xi32 (i32) -> (v128){{$}}
; CHECK-NEXT: i64.load32_s $push[[L0:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $pop[[L0]]{{$}}
; CHECK-NEXT: i64.load32_s $push[[L2:[0-9]+]]=, 4($0){{$}}
@@ -48,7 +45,7 @@ define <2 x i64> @load_sext_2xi32(<2 x i
}
; CHECK-LABEL: store_trunc_2xi32:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_trunc_2xi32 (i32, v128) -> (){{$}}
; CHECK-NEXT: i64x2.extract_lane $push[[L0:[0-9]+]]=, $1, 1
; CHECK-NEXT: i64.store32 4($0), $pop[[L0]]
; CHECK-NEXT: i64x2.extract_lane $push[[L1:[0-9]+]]=, $1, 0
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll Mon Nov 19 09:10:36 2018
@@ -12,8 +12,7 @@ target triple = "wasm32-unknown-unknown"
; 16 x i8
; ==============================================================================
; CHECK-LABEL: add_sat_s_v16i8:
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_sat_s_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.add_saturate_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8>, <16 x i8>)
@@ -23,8 +22,7 @@ define <16 x i8> @add_sat_s_v16i8(<16 x
}
; CHECK-LABEL: add_sat_u_v16i8:
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_sat_u_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.add_saturate_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <16 x i8> @llvm.uadd.sat.v16i8(<16 x i8>, <16 x i8>)
@@ -34,8 +32,7 @@ define <16 x i8> @add_sat_u_v16i8(<16 x
}
; CHECK-LABEL: sub_sat_s_v16i8:
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_sat_s_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.sub_saturate_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <16 x i8> @llvm.wasm.sub.saturate.signed.v16i8(<16 x i8>, <16 x i8>)
@@ -47,8 +44,7 @@ define <16 x i8> @sub_sat_s_v16i8(<16 x
}
; CHECK-LABEL: sub_sat_u_v16i8:
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_sat_u_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i8x16.sub_saturate_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <16 x i8> @llvm.wasm.sub.saturate.unsigned.v16i8(<16 x i8>, <16 x i8>)
@@ -60,8 +56,7 @@ define <16 x i8> @sub_sat_u_v16i8(<16 x
}
; CHECK-LABEL: any_v16i8:
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype any_v16i8 (v128) -> (i32){{$}}
; SIMD128-NEXT: i8x16.any_true $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare i32 @llvm.wasm.anytrue.v16i8(<16 x i8>)
@@ -71,8 +66,7 @@ define i32 @any_v16i8(<16 x i8> %x) {
}
; CHECK-LABEL: all_v16i8:
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype all_v16i8 (v128) -> (i32){{$}}
; SIMD128-NEXT: i8x16.all_true $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare i32 @llvm.wasm.alltrue.v16i8(<16 x i8>)
@@ -82,8 +76,7 @@ define i32 @all_v16i8(<16 x i8> %x) {
}
; CHECK-LABEL: bitselect_v16i8:
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v16i8 (v128, v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <16 x i8> @llvm.wasm.bitselect.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
@@ -98,8 +91,7 @@ define <16 x i8> @bitselect_v16i8(<16 x
; 8 x i16
; ==============================================================================
; CHECK-LABEL: add_sat_s_v8i16:
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_sat_s_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.add_saturate_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)
@@ -109,8 +101,7 @@ define <8 x i16> @add_sat_s_v8i16(<8 x i
}
; CHECK-LABEL: add_sat_u_v8i16:
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype add_sat_u_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.add_saturate_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16>, <8 x i16>)
@@ -120,8 +111,7 @@ define <8 x i16> @add_sat_u_v8i16(<8 x i
}
; CHECK-LABEL: sub_sat_s_v8i16:
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_sat_s_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.sub_saturate_s $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <8 x i16> @llvm.wasm.sub.saturate.signed.v8i16(<8 x i16>, <8 x i16>)
@@ -133,8 +123,7 @@ define <8 x i16> @sub_sat_s_v8i16(<8 x i
}
; CHECK-LABEL: sub_sat_u_v8i16:
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sub_sat_u_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: i16x8.sub_saturate_u $push[[R:[0-9]+]]=, $0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <8 x i16> @llvm.wasm.sub.saturate.unsigned.v8i16(<8 x i16>, <8 x i16>)
@@ -146,8 +135,7 @@ define <8 x i16> @sub_sat_u_v8i16(<8 x i
}
; CHECK-LABEL: any_v8i16:
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype any_v8i16 (v128) -> (i32){{$}}
; SIMD128-NEXT: i16x8.any_true $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare i32 @llvm.wasm.anytrue.v8i16(<8 x i16>)
@@ -157,8 +145,7 @@ define i32 @any_v8i16(<8 x i16> %x) {
}
; CHECK-LABEL: all_v8i16:
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype all_v8i16 (v128) -> (i32){{$}}
; SIMD128-NEXT: i16x8.all_true $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare i32 @llvm.wasm.alltrue.v8i16(<8 x i16>)
@@ -168,8 +155,7 @@ define i32 @all_v8i16(<8 x i16> %x) {
}
; CHECK-LABEL: bitselect_v8i16:
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v8i16 (v128, v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <8 x i16> @llvm.wasm.bitselect.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
@@ -184,8 +170,7 @@ define <8 x i16> @bitselect_v8i16(<8 x i
; 4 x i32
; ==============================================================================
; CHECK-LABEL: any_v4i32:
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype any_v4i32 (v128) -> (i32){{$}}
; SIMD128-NEXT: i32x4.any_true $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare i32 @llvm.wasm.anytrue.v4i32(<4 x i32>)
@@ -195,8 +180,7 @@ define i32 @any_v4i32(<4 x i32> %x) {
}
; CHECK-LABEL: all_v4i32:
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype all_v4i32 (v128) -> (i32){{$}}
; SIMD128-NEXT: i32x4.all_true $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare i32 @llvm.wasm.alltrue.v4i32(<4 x i32>)
@@ -206,8 +190,7 @@ define i32 @all_v4i32(<4 x i32> %x) {
}
; CHECK-LABEL: bitselect_v4i32:
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v4i32 (v128, v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x i32> @llvm.wasm.bitselect.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
@@ -220,8 +203,7 @@ define <4 x i32> @bitselect_v4i32(<4 x i
; CHECK-LABEL: trunc_sat_s_v4i32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype trunc_sat_s_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.trunc_sat_s/f32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
declare <4 x i32> @llvm.wasm.trunc.saturate.signed.v4i32.v4f32(<4 x float>)
@@ -232,8 +214,7 @@ define <4 x i32> @trunc_sat_s_v4i32(<4 x
; CHECK-LABEL: trunc_sat_u_v4i32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype trunc_sat_u_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.trunc_sat_u/f32x4 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
declare <4 x i32> @llvm.wasm.trunc.saturate.unsigned.v4i32.v4f32(<4 x float>)
@@ -246,8 +227,7 @@ define <4 x i32> @trunc_sat_u_v4i32(<4 x
; 2 x i64
; ==============================================================================
; CHECK-LABEL: any_v2i64:
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype any_v2i64 (v128) -> (i32){{$}}
; SIMD128-NEXT: i64x2.any_true $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare i32 @llvm.wasm.anytrue.v2i64(<2 x i64>)
@@ -257,8 +237,7 @@ define i32 @any_v2i64(<2 x i64> %x) {
}
; CHECK-LABEL: all_v2i64:
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype all_v2i64 (v128) -> (i32){{$}}
; SIMD128-NEXT: i64x2.all_true $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare i32 @llvm.wasm.alltrue.v2i64(<2 x i64>)
@@ -268,8 +247,7 @@ define i32 @all_v2i64(<2 x i64> %x) {
}
; CHECK-LABEL: bitselect_v2i64:
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v2i64 (v128, v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <2 x i64> @llvm.wasm.bitselect.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
@@ -282,8 +260,7 @@ define <2 x i64> @bitselect_v2i64(<2 x i
; CHECK-LABEL: trunc_sat_s_v2i64:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.trunc_sat_s/f64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
declare <2 x i64> @llvm.wasm.trunc.saturate.signed.v2i64.v2f64(<2 x double>)
@@ -294,8 +271,7 @@ define <2 x i64> @trunc_sat_s_v2i64(<2 x
; CHECK-LABEL: trunc_sat_u_v2i64:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.trunc_sat_u/f64x2 $push[[R:[0-9]+]]=, $0
; SIMD128-NEXT: return $pop[[R]]
declare <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double>)
@@ -308,8 +284,7 @@ define <2 x i64> @trunc_sat_u_v2i64(<2 x
; 4 x f32
; ==============================================================================
; CHECK-LABEL: bitselect_v4f32:
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v4f32 (v128, v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x float> @llvm.wasm.bitselect.v4f32(<4 x float>, <4 x float>, <4 x float>)
@@ -324,8 +299,7 @@ define <4 x float> @bitselect_v4f32(<4 x
; 2 x f64
; ==============================================================================
; CHECK-LABEL: bitselect_v2f64:
-; SIMD128-NEXT: .param v128, v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype bitselect_v2f64 (v128, v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <2 x double> @llvm.wasm.bitselect.v2f64(<2 x double>, <2 x double>, <2 x double>)
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-load-store-alignment.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-load-store-alignment.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-load-store-alignment.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-load-store-alignment.ll Mon Nov 19 09:10:36 2018
@@ -10,8 +10,7 @@ target triple = "wasm32-unknown-unknown"
; ==============================================================================
; CHECK-LABEL: load_v16i8_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v16i8_a1 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @load_v16i8_a1(<16 x i8> *%p) {
@@ -20,8 +19,7 @@ define <16 x i8> @load_v16i8_a1(<16 x i8
}
; CHECK-LABEL: load_v16i8_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v16i8_a4 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=2{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @load_v16i8_a4(<16 x i8> *%p) {
@@ -32,8 +30,7 @@ define <16 x i8> @load_v16i8_a4(<16 x i8
; 16 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: load_v16i8_a16:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v16i8_a16 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @load_v16i8_a16(<16 x i8> *%p) {
@@ -44,8 +41,7 @@ define <16 x i8> @load_v16i8_a16(<16 x i
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: load_v16i8_a32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v16i8_a32 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @load_v16i8_a32(<16 x i8> *%p) {
@@ -54,7 +50,7 @@ define <16 x i8> @load_v16i8_a32(<16 x i
}
; CHECK-LABEL: store_v16i8_a1:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v16i8_a1 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v16i8_a1(<16 x i8> *%p, <16 x i8> %v) {
@@ -63,7 +59,7 @@ define void @store_v16i8_a1(<16 x i8> *%
}
; CHECK-LABEL: store_v16i8_a4:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v16i8_a4 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=2, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v16i8_a4(<16 x i8> *%p, <16 x i8> %v) {
@@ -74,7 +70,7 @@ define void @store_v16i8_a4(<16 x i8> *%
; 16 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: store_v16i8_a16:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v16i8_a16 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v16i8_a16(<16 x i8> *%p, <16 x i8> %v) {
@@ -85,7 +81,7 @@ define void @store_v16i8_a16(<16 x i8> *
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: store_v16i8_a32:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v16i8_a32 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v16i8_a32(<16 x i8> *%p, <16 x i8> %v) {
@@ -98,8 +94,7 @@ define void @store_v16i8_a32(<16 x i8> *
; ==============================================================================
; CHECK-LABEL: load_v8i16_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v8i16_a1 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @load_v8i16_a1(<8 x i16> *%p) {
@@ -108,8 +103,7 @@ define <8 x i16> @load_v8i16_a1(<8 x i16
}
; CHECK-LABEL: load_v8i16_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v8i16_a4 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=2{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @load_v8i16_a4(<8 x i16> *%p) {
@@ -120,8 +114,7 @@ define <8 x i16> @load_v8i16_a4(<8 x i16
; 8 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: load_v8i16_a16:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v8i16_a16 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @load_v8i16_a16(<8 x i16> *%p) {
@@ -132,8 +125,7 @@ define <8 x i16> @load_v8i16_a16(<8 x i1
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: load_v8i16_a32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v8i16_a32 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @load_v8i16_a32(<8 x i16> *%p) {
@@ -142,7 +134,7 @@ define <8 x i16> @load_v8i16_a32(<8 x i1
}
; CHECK-LABEL: store_v8i16_a1:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v8i16_a1 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v8i16_a1(<8 x i16> *%p, <8 x i16> %v) {
@@ -151,7 +143,7 @@ define void @store_v8i16_a1(<8 x i16> *%
}
; CHECK-LABEL: store_v8i16_a4:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v8i16_a4 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=2, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v8i16_a4(<8 x i16> *%p, <8 x i16> %v) {
@@ -162,7 +154,7 @@ define void @store_v8i16_a4(<8 x i16> *%
; 16 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: store_v8i16_a16:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v8i16_a16 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v8i16_a16(<8 x i16> *%p, <8 x i16> %v) {
@@ -173,7 +165,7 @@ define void @store_v8i16_a16(<8 x i16> *
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: store_v8i16_a32:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v8i16_a32 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v8i16_a32(<8 x i16> *%p, <8 x i16> %v) {
@@ -186,8 +178,7 @@ define void @store_v8i16_a32(<8 x i16> *
; ==============================================================================
; CHECK-LABEL: load_v4i32_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v4i32_a1 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @load_v4i32_a1(<4 x i32> *%p) {
@@ -196,8 +187,7 @@ define <4 x i32> @load_v4i32_a1(<4 x i32
}
; CHECK-LABEL: load_v4i32_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v4i32_a4 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=2{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @load_v4i32_a4(<4 x i32> *%p) {
@@ -208,8 +198,7 @@ define <4 x i32> @load_v4i32_a4(<4 x i32
; 4 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: load_v4i32_a16:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v4i32_a16 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @load_v4i32_a16(<4 x i32> *%p) {
@@ -220,8 +209,7 @@ define <4 x i32> @load_v4i32_a16(<4 x i3
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: load_v4i32_a32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v4i32_a32 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @load_v4i32_a32(<4 x i32> *%p) {
@@ -230,7 +218,7 @@ define <4 x i32> @load_v4i32_a32(<4 x i3
}
; CHECK-LABEL: store_v4i32_a1:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v4i32_a1 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v4i32_a1(<4 x i32> *%p, <4 x i32> %v) {
@@ -239,7 +227,7 @@ define void @store_v4i32_a1(<4 x i32> *%
}
; CHECK-LABEL: store_v4i32_a4:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v4i32_a4 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=2, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v4i32_a4(<4 x i32> *%p, <4 x i32> %v) {
@@ -250,7 +238,7 @@ define void @store_v4i32_a4(<4 x i32> *%
; 16 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: store_v4i32_a16:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v4i32_a16 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v4i32_a16(<4 x i32> *%p, <4 x i32> %v) {
@@ -261,7 +249,7 @@ define void @store_v4i32_a16(<4 x i32> *
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: store_v4i32_a32:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v4i32_a32 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v4i32_a32(<4 x i32> *%p, <4 x i32> %v) {
@@ -274,8 +262,7 @@ define void @store_v4i32_a32(<4 x i32> *
; ==============================================================================
; CHECK-LABEL: load_v2i64_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v2i64_a1 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @load_v2i64_a1(<2 x i64> *%p) {
@@ -284,8 +271,7 @@ define <2 x i64> @load_v2i64_a1(<2 x i64
}
; CHECK-LABEL: load_v2i64_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v2i64_a4 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=2{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @load_v2i64_a4(<2 x i64> *%p) {
@@ -296,8 +282,7 @@ define <2 x i64> @load_v2i64_a4(<2 x i64
; 2 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: load_v2i64_a16:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v2i64_a16 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @load_v2i64_a16(<2 x i64> *%p) {
@@ -308,8 +293,7 @@ define <2 x i64> @load_v2i64_a16(<2 x i6
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: load_v2i64_a32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v2i64_a32 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @load_v2i64_a32(<2 x i64> *%p) {
@@ -318,7 +302,7 @@ define <2 x i64> @load_v2i64_a32(<2 x i6
}
; CHECK-LABEL: store_v2i64_a1:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v2i64_a1 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v2i64_a1(<2 x i64> *%p, <2 x i64> %v) {
@@ -327,7 +311,7 @@ define void @store_v2i64_a1(<2 x i64> *%
}
; CHECK-LABEL: store_v2i64_a4:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v2i64_a4 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=2, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v2i64_a4(<2 x i64> *%p, <2 x i64> %v) {
@@ -338,7 +322,7 @@ define void @store_v2i64_a4(<2 x i64> *%
; 16 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: store_v2i64_a16:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v2i64_a16 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v2i64_a16(<2 x i64> *%p, <2 x i64> %v) {
@@ -349,7 +333,7 @@ define void @store_v2i64_a16(<2 x i64> *
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: store_v2i64_a32:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v2i64_a32 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v2i64_a32(<2 x i64> *%p, <2 x i64> %v) {
@@ -362,8 +346,7 @@ define void @store_v2i64_a32(<2 x i64> *
; ==============================================================================
; CHECK-LABEL: load_v4f32_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v4f32_a1 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <4 x float> @load_v4f32_a1(<4 x float> *%p) {
@@ -372,8 +355,7 @@ define <4 x float> @load_v4f32_a1(<4 x f
}
; CHECK-LABEL: load_v4f32_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v4f32_a4 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=2{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <4 x float> @load_v4f32_a4(<4 x float> *%p) {
@@ -384,8 +366,7 @@ define <4 x float> @load_v4f32_a4(<4 x f
; 4 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: load_v4f32_a16:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v4f32_a16 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <4 x float> @load_v4f32_a16(<4 x float> *%p) {
@@ -396,8 +377,7 @@ define <4 x float> @load_v4f32_a16(<4 x
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: load_v4f32_a32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v4f32_a32 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <4 x float> @load_v4f32_a32(<4 x float> *%p) {
@@ -406,7 +386,7 @@ define <4 x float> @load_v4f32_a32(<4 x
}
; CHECK-LABEL: store_v4f32_a1:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v4f32_a1 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v4f32_a1(<4 x float> *%p, <4 x float> %v) {
@@ -415,7 +395,7 @@ define void @store_v4f32_a1(<4 x float>
}
; CHECK-LABEL: store_v4f32_a4:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v4f32_a4 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=2, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v4f32_a4(<4 x float> *%p, <4 x float> %v) {
@@ -426,7 +406,7 @@ define void @store_v4f32_a4(<4 x float>
; 16 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: store_v4f32_a16:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v4f32_a16 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v4f32_a16(<4 x float> *%p, <4 x float> %v) {
@@ -437,7 +417,7 @@ define void @store_v4f32_a16(<4 x float>
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: store_v4f32_a32:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v4f32_a32 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v4f32_a32(<4 x float> *%p, <4 x float> %v) {
@@ -450,8 +430,7 @@ define void @store_v4f32_a32(<4 x float>
; ==============================================================================
; CHECK-LABEL: load_v2f64_a1:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v2f64_a1 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <2 x double> @load_v2f64_a1(<2 x double> *%p) {
@@ -460,8 +439,7 @@ define <2 x double> @load_v2f64_a1(<2 x
}
; CHECK-LABEL: load_v2f64_a4:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v2f64_a4 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=2{{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <2 x double> @load_v2f64_a4(<2 x double> *%p) {
@@ -472,8 +450,7 @@ define <2 x double> @load_v2f64_a4(<2 x
; 2 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: load_v2f64_a16:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v2f64_a16 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <2 x double> @load_v2f64_a16(<2 x double> *%p) {
@@ -484,8 +461,7 @@ define <2 x double> @load_v2f64_a16(<2 x
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: load_v2f64_a32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype load_v2f64_a32 (i32) -> (v128){{$}}
; CHECK-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: return $pop[[R]]{{$}}
define <2 x double> @load_v2f64_a32(<2 x double> *%p) {
@@ -494,7 +470,7 @@ define <2 x double> @load_v2f64_a32(<2 x
}
; CHECK-LABEL: store_v2f64_a1:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v2f64_a1 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=0, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v2f64_a1(<2 x double> *%p, <2 x double> %v) {
@@ -503,7 +479,7 @@ define void @store_v2f64_a1(<2 x double>
}
; CHECK-LABEL: store_v2f64_a4:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v2f64_a4 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0):p2align=2, $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v2f64_a4(<2 x double> *%p, <2 x double> %v) {
@@ -514,7 +490,7 @@ define void @store_v2f64_a4(<2 x double>
; 16 is the default alignment for v128 so no attribute is needed.
; CHECK-LABEL: store_v2f64_a16:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v2f64_a16 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v2f64_a16(<2 x double> *%p, <2 x double> %v) {
@@ -525,7 +501,7 @@ define void @store_v2f64_a16(<2 x double
; 32 is greater than the default alignment so it is ignored.
; CHECK-LABEL: store_v2f64_a32:
-; CHECK-NEXT: .param i32, v128{{$}}
+; CHECK-NEXT: .functype store_v2f64_a32 (i32, v128) -> (){{$}}
; CHECK-NEXT: v128.store 0($0), $1{{$}}
; CHECK-NEXT: return{{$}}
define void @store_v2f64_a32(<2 x double> *%p, <2 x double> %v) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll Mon Nov 19 09:10:36 2018
@@ -12,8 +12,7 @@ target triple = "wasm32-unknown-unknown"
; ==============================================================================
; CHECK-LABEL: load_v16i8:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v16i8 (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @load_v16i8(<16 x i8>* %p) {
@@ -23,8 +22,7 @@ define <16 x i8> @load_v16i8(<16 x i8>*
; CHECK-LABEL: load_v16i8_with_folded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v16i8_with_folded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @load_v16i8_with_folded_offset(<16 x i8>* %p) {
@@ -37,8 +35,7 @@ define <16 x i8> @load_v16i8_with_folded
; CHECK-LABEL: load_v16i8_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v16i8_with_folded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @load_v16i8_with_folded_gep_offset(<16 x i8>* %p) {
@@ -49,8 +46,7 @@ define <16 x i8> @load_v16i8_with_folded
; CHECK-LABEL: load_v16i8_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v16i8_with_unfolded_gep_negative_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -63,8 +59,7 @@ define <16 x i8> @load_v16i8_with_unfold
; CHECK-LABEL: load_v16i8_with_unfolded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v16i8_with_unfolded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -79,8 +74,7 @@ define <16 x i8> @load_v16i8_with_unfold
; CHECK-LABEL: load_v16i8_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v16i8_with_unfolded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -93,7 +87,7 @@ define <16 x i8> @load_v16i8_with_unfold
; CHECK-LABEL: load_v16i8_from_numeric_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v16i8_from_numeric_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -105,7 +99,7 @@ define <16 x i8> @load_v16i8_from_numeri
; CHECK-LABEL: load_v16i8_from_global_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v16i8_from_global_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v16i8($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -117,7 +111,7 @@ define <16 x i8> @load_v16i8_from_global
; CHECK-LABEL: store_v16i8:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v16i8 (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 0($1), $0{{$}}
define void @store_v16i8(<16 x i8> %v, <16 x i8>* %p) {
store <16 x i8> %v , <16 x i8>* %p
@@ -126,7 +120,7 @@ define void @store_v16i8(<16 x i8> %v, <
; CHECK-LABEL: store_v16i8_with_folded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v16i8_with_folded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v16i8_with_folded_offset(<16 x i8> %v, <16 x i8>* %p) {
%q = ptrtoint <16 x i8>* %p to i32
@@ -138,7 +132,7 @@ define void @store_v16i8_with_folded_off
; CHECK-LABEL: store_v16i8_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v16i8_with_folded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v16i8_with_folded_gep_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 1
@@ -148,7 +142,7 @@ define void @store_v16i8_with_folded_gep
; CHECK-LABEL: store_v16i8_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v16i8_with_unfolded_gep_negative_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -160,7 +154,7 @@ define void @store_v16i8_with_unfolded_g
; CHECK-LABEL: store_v16i8_with_unfolded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v16i8_with_unfolded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -172,7 +166,7 @@ define void @store_v16i8_with_unfolded_o
; CHECK-LABEL: store_v16i8_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v16i8_with_unfolded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -184,7 +178,7 @@ define void @store_v16i8_with_unfolded_g
; CHECK-LABEL: store_v16i8_to_numeric_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v16i8_to_numeric_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store 32($pop[[R]]), $0{{$}}
define void @store_v16i8_to_numeric_address(<16 x i8> %v) {
@@ -195,7 +189,7 @@ define void @store_v16i8_to_numeric_addr
; CHECK-LABEL: store_v16i8_to_global_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v16i8_to_global_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store gv_v16i8($pop[[R]]), $0{{$}}
define void @store_v16i8_to_global_address(<16 x i8> %v) {
@@ -208,8 +202,7 @@ define void @store_v16i8_to_global_addre
; ==============================================================================
; CHECK-LABEL: load_v8i16:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v8i16 (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @load_v8i16(<8 x i16>* %p) {
@@ -219,8 +212,7 @@ define <8 x i16> @load_v8i16(<8 x i16>*
; CHECK-LABEL: load_v8i16_with_folded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v8i16_with_folded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @load_v8i16_with_folded_offset(<8 x i16>* %p) {
@@ -233,8 +225,7 @@ define <8 x i16> @load_v8i16_with_folded
; CHECK-LABEL: load_v8i16_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v8i16_with_folded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @load_v8i16_with_folded_gep_offset(<8 x i16>* %p) {
@@ -245,8 +236,7 @@ define <8 x i16> @load_v8i16_with_folded
; CHECK-LABEL: load_v8i16_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v8i16_with_unfolded_gep_negative_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -259,8 +249,7 @@ define <8 x i16> @load_v8i16_with_unfold
; CHECK-LABEL: load_v8i16_with_unfolded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v8i16_with_unfolded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[L0:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -275,8 +264,7 @@ define <8 x i16> @load_v8i16_with_unfold
; CHECK-LABEL: load_v8i16_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v8i16_with_unfolded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -289,7 +277,7 @@ define <8 x i16> @load_v8i16_with_unfold
; CHECK-LABEL: load_v8i16_from_numeric_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v8i16_from_numeric_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -301,7 +289,7 @@ define <8 x i16> @load_v8i16_from_numeri
; CHECK-LABEL: load_v8i16_from_global_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v8i16_from_global_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v8i16($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -313,7 +301,7 @@ define <8 x i16> @load_v8i16_from_global
; CHECK-LABEL: store_v8i16:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v8i16 (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 0($1), $0{{$}}
define void @store_v8i16(<8 x i16> %v, <8 x i16>* %p) {
store <8 x i16> %v , <8 x i16>* %p
@@ -322,7 +310,7 @@ define void @store_v8i16(<8 x i16> %v, <
; CHECK-LABEL: store_v8i16_with_folded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v8i16_with_folded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v8i16_with_folded_offset(<8 x i16> %v, <8 x i16>* %p) {
%q = ptrtoint <8 x i16>* %p to i32
@@ -334,7 +322,7 @@ define void @store_v8i16_with_folded_off
; CHECK-LABEL: store_v8i16_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v8i16_with_folded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v8i16_with_folded_gep_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 1
@@ -344,7 +332,7 @@ define void @store_v8i16_with_folded_gep
; CHECK-LABEL: store_v8i16_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v8i16_with_unfolded_gep_negative_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -356,7 +344,7 @@ define void @store_v8i16_with_unfolded_g
; CHECK-LABEL: store_v8i16_with_unfolded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v8i16_with_unfolded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -368,7 +356,7 @@ define void @store_v8i16_with_unfolded_o
; CHECK-LABEL: store_v8i16_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v8i16_with_unfolded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -380,7 +368,7 @@ define void @store_v8i16_with_unfolded_g
; CHECK-LABEL: store_v8i16_to_numeric_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v8i16_to_numeric_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store 32($pop[[L0]]), $0{{$}}
define void @store_v8i16_to_numeric_address(<8 x i16> %v) {
@@ -391,7 +379,7 @@ define void @store_v8i16_to_numeric_addr
; CHECK-LABEL: store_v8i16_to_global_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v8i16_to_global_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store gv_v8i16($pop[[R]]), $0{{$}}
define void @store_v8i16_to_global_address(<8 x i16> %v) {
@@ -404,8 +392,7 @@ define void @store_v8i16_to_global_addre
; ==============================================================================
; CHECK-LABEL: load_v4i32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4i32 (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @load_v4i32(<4 x i32>* %p) {
@@ -415,8 +402,7 @@ define <4 x i32> @load_v4i32(<4 x i32>*
; CHECK-LABEL: load_v4i32_with_folded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4i32_with_folded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @load_v4i32_with_folded_offset(<4 x i32>* %p) {
@@ -429,8 +415,7 @@ define <4 x i32> @load_v4i32_with_folded
; CHECK-LABEL: load_v4i32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4i32_with_folded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @load_v4i32_with_folded_gep_offset(<4 x i32>* %p) {
@@ -441,8 +426,7 @@ define <4 x i32> @load_v4i32_with_folded
; CHECK-LABEL: load_v4i32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4i32_with_unfolded_gep_negative_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -455,8 +439,7 @@ define <4 x i32> @load_v4i32_with_unfold
; CHECK-LABEL: load_v4i32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4i32_with_unfolded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -471,8 +454,7 @@ define <4 x i32> @load_v4i32_with_unfold
; CHECK-LABEL: load_v4i32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4i32_with_unfolded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -485,7 +467,7 @@ define <4 x i32> @load_v4i32_with_unfold
; CHECK-LABEL: load_v4i32_from_numeric_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4i32_from_numeric_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -497,7 +479,7 @@ define <4 x i32> @load_v4i32_from_numeri
; CHECK-LABEL: load_v4i32_from_global_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4i32_from_global_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v4i32($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -509,7 +491,7 @@ define <4 x i32> @load_v4i32_from_global
; CHECK-LABEL: store_v4i32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4i32 (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 0($1), $0{{$}}
define void @store_v4i32(<4 x i32> %v, <4 x i32>* %p) {
store <4 x i32> %v , <4 x i32>* %p
@@ -518,7 +500,7 @@ define void @store_v4i32(<4 x i32> %v, <
; CHECK-LABEL: store_v4i32_with_folded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4i32_with_folded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v4i32_with_folded_offset(<4 x i32> %v, <4 x i32>* %p) {
%q = ptrtoint <4 x i32>* %p to i32
@@ -530,7 +512,7 @@ define void @store_v4i32_with_folded_off
; CHECK-LABEL: store_v4i32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4i32_with_folded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v4i32_with_folded_gep_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 1
@@ -540,7 +522,7 @@ define void @store_v4i32_with_folded_gep
; CHECK-LABEL: store_v4i32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4i32_with_unfolded_gep_negative_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -552,7 +534,7 @@ define void @store_v4i32_with_unfolded_g
; CHECK-LABEL: store_v4i32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4i32_with_unfolded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -564,7 +546,7 @@ define void @store_v4i32_with_unfolded_o
; CHECK-LABEL: store_v4i32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4i32_with_unfolded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -576,7 +558,7 @@ define void @store_v4i32_with_unfolded_g
; CHECK-LABEL: store_v4i32_to_numeric_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v4i32_to_numeric_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store 32($pop[[L0]]), $0{{$}}
define void @store_v4i32_to_numeric_address(<4 x i32> %v) {
@@ -587,7 +569,7 @@ define void @store_v4i32_to_numeric_addr
; CHECK-LABEL: store_v4i32_to_global_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v4i32_to_global_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store gv_v4i32($pop[[R]]), $0{{$}}
define void @store_v4i32_to_global_address(<4 x i32> %v) {
@@ -601,8 +583,7 @@ define void @store_v4i32_to_global_addre
; CHECK-LABEL: load_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2i64 (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @load_v2i64(<2 x i64>* %p) {
@@ -613,8 +594,7 @@ define <2 x i64> @load_v2i64(<2 x i64>*
; CHECK-LABEL: load_v2i64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2i64_with_folded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @load_v2i64_with_folded_offset(<2 x i64>* %p) {
@@ -628,8 +608,7 @@ define <2 x i64> @load_v2i64_with_folded
; CHECK-LABEL: load_v2i64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2i64_with_folded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @load_v2i64_with_folded_gep_offset(<2 x i64>* %p) {
@@ -641,8 +620,7 @@ define <2 x i64> @load_v2i64_with_folded
; CHECK-LABEL: load_v2i64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2i64_with_unfolded_gep_negative_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -656,8 +634,7 @@ define <2 x i64> @load_v2i64_with_unfold
; CHECK-LABEL: load_v2i64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2i64_with_unfolded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -673,8 +650,7 @@ define <2 x i64> @load_v2i64_with_unfold
; CHECK-LABEL: load_v2i64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2i64_with_unfolded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -688,7 +664,7 @@ define <2 x i64> @load_v2i64_with_unfold
; CHECK-LABEL: load_v2i64_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2i64_from_numeric_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -701,7 +677,7 @@ define <2 x i64> @load_v2i64_from_numeri
; CHECK-LABEL: load_v2i64_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2i64_from_global_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v2i64($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -714,7 +690,7 @@ define <2 x i64> @load_v2i64_from_global
; CHECK-LABEL: store_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2i64 (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 0($1), $0{{$}}
define void @store_v2i64(<2 x i64> %v, <2 x i64>* %p) {
store <2 x i64> %v , <2 x i64>* %p
@@ -724,7 +700,7 @@ define void @store_v2i64(<2 x i64> %v, <
; CHECK-LABEL: store_v2i64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2i64_with_folded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v2i64_with_folded_offset(<2 x i64> %v, <2 x i64>* %p) {
%q = ptrtoint <2 x i64>* %p to i32
@@ -737,7 +713,7 @@ define void @store_v2i64_with_folded_off
; CHECK-LABEL: store_v2i64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2i64_with_folded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v2i64_with_folded_gep_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 1
@@ -748,7 +724,7 @@ define void @store_v2i64_with_folded_gep
; CHECK-LABEL: store_v2i64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2i64_with_unfolded_gep_negative_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -761,7 +737,7 @@ define void @store_v2i64_with_unfolded_g
; CHECK-LABEL: store_v2i64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2i64_with_unfolded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -774,7 +750,7 @@ define void @store_v2i64_with_unfolded_o
; CHECK-LABEL: store_v2i64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2i64_with_unfolded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -787,7 +763,7 @@ define void @store_v2i64_with_unfolded_g
; CHECK-LABEL: store_v2i64_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v2i64_to_numeric_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store 32($pop[[L0]]), $0{{$}}
define void @store_v2i64_to_numeric_address(<2 x i64> %v) {
@@ -799,7 +775,7 @@ define void @store_v2i64_to_numeric_addr
; CHECK-LABEL: store_v2i64_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v2i64_to_global_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store gv_v2i64($pop[[R]]), $0{{$}}
define void @store_v2i64_to_global_address(<2 x i64> %v) {
@@ -812,8 +788,7 @@ define void @store_v2i64_to_global_addre
; ==============================================================================
; CHECK-LABEL: load_v4f32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4f32 (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @load_v4f32(<4 x float>* %p) {
@@ -823,8 +798,7 @@ define <4 x float> @load_v4f32(<4 x floa
; CHECK-LABEL: load_v4f32_with_folded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4f32_with_folded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @load_v4f32_with_folded_offset(<4 x float>* %p) {
@@ -837,8 +811,7 @@ define <4 x float> @load_v4f32_with_fold
; CHECK-LABEL: load_v4f32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4f32_with_folded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @load_v4f32_with_folded_gep_offset(<4 x float>* %p) {
@@ -849,8 +822,7 @@ define <4 x float> @load_v4f32_with_fold
; CHECK-LABEL: load_v4f32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4f32_with_unfolded_gep_negative_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -863,8 +835,7 @@ define <4 x float> @load_v4f32_with_unfo
; CHECK-LABEL: load_v4f32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4f32_with_unfolded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -879,8 +850,7 @@ define <4 x float> @load_v4f32_with_unfo
; CHECK-LABEL: load_v4f32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4f32_with_unfolded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -893,7 +863,7 @@ define <4 x float> @load_v4f32_with_unfo
; CHECK-LABEL: load_v4f32_from_numeric_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4f32_from_numeric_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -905,7 +875,7 @@ define <4 x float> @load_v4f32_from_nume
; CHECK-LABEL: load_v4f32_from_global_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v4f32_from_global_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v4f32($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -917,7 +887,7 @@ define <4 x float> @load_v4f32_from_glob
; CHECK-LABEL: store_v4f32:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4f32 (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 0($1), $0{{$}}
define void @store_v4f32(<4 x float> %v, <4 x float>* %p) {
store <4 x float> %v , <4 x float>* %p
@@ -926,7 +896,7 @@ define void @store_v4f32(<4 x float> %v,
; CHECK-LABEL: store_v4f32_with_folded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4f32_with_folded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v4f32_with_folded_offset(<4 x float> %v, <4 x float>* %p) {
%q = ptrtoint <4 x float>* %p to i32
@@ -938,7 +908,7 @@ define void @store_v4f32_with_folded_off
; CHECK-LABEL: store_v4f32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4f32_with_folded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v4f32_with_folded_gep_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 1
@@ -948,7 +918,7 @@ define void @store_v4f32_with_folded_gep
; CHECK-LABEL: store_v4f32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4f32_with_unfolded_gep_negative_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -960,7 +930,7 @@ define void @store_v4f32_with_unfolded_g
; CHECK-LABEL: store_v4f32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4f32_with_unfolded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -972,7 +942,7 @@ define void @store_v4f32_with_unfolded_o
; CHECK-LABEL: store_v4f32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v4f32_with_unfolded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -984,7 +954,7 @@ define void @store_v4f32_with_unfolded_g
; CHECK-LABEL: store_v4f32_to_numeric_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v4f32_to_numeric_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store 32($pop[[L0]]), $0{{$}}
define void @store_v4f32_to_numeric_address(<4 x float> %v) {
@@ -995,7 +965,7 @@ define void @store_v4f32_to_numeric_addr
; CHECK-LABEL: store_v4f32_to_global_address:
; NO-SIMD128-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v4f32_to_global_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store gv_v4f32($pop[[R]]), $0{{$}}
define void @store_v4f32_to_global_address(<4 x float> %v) {
@@ -1009,8 +979,7 @@ define void @store_v4f32_to_global_addre
; CHECK-LABEL: load_v2f64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2f64 (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @load_v2f64(<2 x double>* %p) {
@@ -1021,8 +990,7 @@ define <2 x double> @load_v2f64(<2 x dou
; CHECK-LABEL: load_v2f64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2f64_with_folded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @load_v2f64_with_folded_offset(<2 x double>* %p) {
@@ -1036,8 +1004,7 @@ define <2 x double> @load_v2f64_with_fol
; CHECK-LABEL: load_v2f64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2f64_with_folded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @load_v2f64_with_folded_gep_offset(<2 x double>* %p) {
@@ -1049,8 +1016,7 @@ define <2 x double> @load_v2f64_with_fol
; CHECK-LABEL: load_v2f64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2f64_with_unfolded_gep_negative_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -1064,8 +1030,7 @@ define <2 x double> @load_v2f64_with_unf
; CHECK-LABEL: load_v2f64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2f64_with_unfolded_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -1081,8 +1046,7 @@ define <2 x double> @load_v2f64_with_unf
; CHECK-LABEL: load_v2f64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2f64_with_unfolded_gep_offset (i32) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]){{$}}
@@ -1096,7 +1060,7 @@ define <2 x double> @load_v2f64_with_unf
; CHECK-LABEL: load_v2f64_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2f64_from_numeric_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1109,7 +1073,7 @@ define <2 x double> @load_v2f64_from_num
; CHECK-LABEL: load_v2f64_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype load_v2f64_from_global_address () -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v2f64($pop[[L0]]){{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1122,7 +1086,7 @@ define <2 x double> @load_v2f64_from_glo
; CHECK-LABEL: store_v2f64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2f64 (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 0($1), $0{{$}}
define void @store_v2f64(<2 x double> %v, <2 x double>* %p) {
store <2 x double> %v , <2 x double>* %p
@@ -1132,7 +1096,7 @@ define void @store_v2f64(<2 x double> %v
; CHECK-LABEL: store_v2f64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2f64_with_folded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v2f64_with_folded_offset(<2 x double> %v, <2 x double>* %p) {
%q = ptrtoint <2 x double>* %p to i32
@@ -1145,7 +1109,7 @@ define void @store_v2f64_with_folded_off
; CHECK-LABEL: store_v2f64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2f64_with_folded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: v128.store 16($1), $0{{$}}
define void @store_v2f64_with_folded_gep_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 1
@@ -1156,7 +1120,7 @@ define void @store_v2f64_with_folded_gep
; CHECK-LABEL: store_v2f64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2f64_with_unfolded_gep_negative_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -1169,7 +1133,7 @@ define void @store_v2f64_with_unfolded_g
; CHECK-LABEL: store_v2f64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2f64_with_unfolded_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -1182,7 +1146,7 @@ define void @store_v2f64_with_unfolded_o
; CHECK-LABEL: store_v2f64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .functype store_v2f64_with_unfolded_gep_offset (v128, i32) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}}
; SIMD128-NEXT: v128.store 0($pop[[R]]), $0{{$}}
@@ -1195,7 +1159,7 @@ define void @store_v2f64_with_unfolded_g
; CHECK-LABEL: store_v2f64_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v2f64_to_numeric_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store 32($pop[[L0]]), $0{{$}}
define void @store_v2f64_to_numeric_address(<2 x double> %v) {
@@ -1207,7 +1171,7 @@ define void @store_v2f64_to_numeric_addr
; CHECK-LABEL: store_v2f64_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
-; SIMD128-NEXT: .param v128{{$}}
+; SIMD128-NEXT: .functype store_v2f64_to_global_address (v128) -> (){{$}}
; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}}
; SIMD128-NEXT: v128.store gv_v2f64($pop[[R]]), $0{{$}}
define void @store_v2f64_to_global_address(<2 x double> %v) {
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-select.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-select.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-select.ll Mon Nov 19 09:10:36 2018
@@ -9,8 +9,7 @@ target triple = "wasm32-unknown-unknown"
; 16 x i8
; ==============================================================================
; CHECK-LABEL: vselect_v16i8:
-; CHECK-NEXT: .param v128, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype vselect_v16i8 (v128, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 7{{$}}
; CHECK-NEXT: i8x16.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 7{{$}}
@@ -23,8 +22,7 @@ define <16 x i8> @vselect_v16i8(<16 x i1
}
; CHECK-LABEL: select_v16i8:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_v16i8 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -37,8 +35,7 @@ define <16 x i8> @select_v16i8(i1 %c, <1
}
; CHECK-LABEL: select_cmp_v16i8:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_cmp_v16i8 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31
; CHECK-NEXT: i32.shr_s $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i8x16.splat $push[[L2:[0-9]+]]=, $pop[[L1]]{{$}}
@@ -51,8 +48,7 @@ define <16 x i8> @select_cmp_v16i8(i32 %
}
; CHECK-LABEL: select_ne_v16i8:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_ne_v16i8 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -66,8 +62,7 @@ define <16 x i8> @select_ne_v16i8(i32 %i
}
; CHECK-LABEL: select_eq_v16i8:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_eq_v16i8 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -84,8 +79,7 @@ define <16 x i8> @select_eq_v16i8(i32 %i
; 8 x i16
; ==============================================================================
; CHECK-LABEL: vselect_v8i16:
-; CHECK-NEXT: .param v128, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype vselect_v8i16 (v128, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 15{{$}}
; CHECK-NEXT: i16x8.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 15{{$}}
@@ -98,8 +92,7 @@ define <8 x i16> @vselect_v8i16(<8 x i1>
}
; CHECK-LABEL: select_v8i16:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_v8i16 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -112,8 +105,7 @@ define <8 x i16> @select_v8i16(i1 %c, <8
}
; CHECK-LABEL: select_cmp_v8i16:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_cmp_v8i16 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
; CHECK-NEXT: i32.shr_s $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i16x8.splat $push[[L2:[0-9]+]]=, $pop[[L1]]{{$}}
@@ -126,8 +118,7 @@ define <8 x i16> @select_cmp_v8i16(i32 %
}
; CHECK-LABEL: select_ne_v8i16:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_ne_v8i16 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -141,8 +132,7 @@ define <8 x i16> @select_ne_v8i16(i32 %i
}
; CHECK-LABEL: select_eq_v8i16:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_eq_v8i16 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -159,8 +149,7 @@ define <8 x i16> @select_eq_v8i16(i32 %i
; 4 x i32
; ==============================================================================
; CHECK-LABEL: vselect_v4i32:
-; CHECK-NEXT: .param v128, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype vselect_v4i32 (v128, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
; CHECK-NEXT: i32x4.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 31{{$}}
@@ -174,8 +163,7 @@ define <4 x i32> @vselect_v4i32(<4 x i1>
; CHECK-LABEL: select_v4i32:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_v4i32 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -188,8 +176,7 @@ define <4 x i32> @select_v4i32(i1 %c, <4
}
; CHECK-LABEL: select_cmp_v4i32:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_cmp_v4i32 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
; CHECK-NEXT: i32.shr_s $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i32x4.splat $push[[L2:[0-9]+]]=, $pop[[L1]]{{$}}
@@ -202,8 +189,7 @@ define <4 x i32> @select_cmp_v4i32(i32 %
}
; CHECK-LABEL: select_ne_v4i32:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_ne_v4i32 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -217,8 +203,7 @@ define <4 x i32> @select_ne_v4i32(i32 %i
}
; CHECK-LABEL: select_eq_v4i32:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_eq_v4i32 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -235,8 +220,7 @@ define <4 x i32> @select_eq_v4i32(i32 %i
; 2 x i64
; ==============================================================================
; CHECK-LABEL: vselect_v2i64:
-; CHECK-NEXT: .param v128, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype vselect_v2i64 (v128, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 63{{$}}
; CHECK-NEXT: i64x2.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 63{{$}}
@@ -249,8 +233,7 @@ define <2 x i64> @vselect_v2i64(<2 x i1>
}
; CHECK-LABEL: select_v2i64:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_v2i64 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -263,8 +246,7 @@ define <2 x i64> @select_v2i64(i1 %c, <2
}
; CHECK-LABEL: select_cmp_v2i64:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_cmp_v2i64 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 0{{$}}
@@ -280,8 +262,7 @@ define <2 x i64> @select_cmp_v2i64(i32 %
}
; CHECK-LABEL: select_ne_v2i64:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_ne_v2i64 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -295,8 +276,7 @@ define <2 x i64> @select_ne_v2i64(i32 %i
}
; CHECK-LABEL: select_eq_v2i64:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_eq_v2i64 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -313,8 +293,7 @@ define <2 x i64> @select_eq_v2i64(i32 %i
; 4 x float
; ==============================================================================
; CHECK-LABEL: vselect_v4f32:
-; CHECK-NEXT: .param v128, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype vselect_v4f32 (v128, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
; CHECK-NEXT: i32x4.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 31{{$}}
@@ -327,8 +306,7 @@ define <4 x float> @vselect_v4f32(<4 x i
}
; CHECK-LABEL: select_v4f32:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_v4f32 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -341,8 +319,7 @@ define <4 x float> @select_v4f32(i1 %c,
}
; CHECK-LABEL: select_cmp_v4f32:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_cmp_v4f32 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
; CHECK-NEXT: i32.shr_s $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i32x4.splat $push[[L2:[0-9]+]]=, $pop[[L1]]{{$}}
@@ -355,8 +332,7 @@ define <4 x float> @select_cmp_v4f32(i32
}
; CHECK-LABEL: select_ne_v4f32:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_ne_v4f32 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -370,8 +346,7 @@ define <4 x float> @select_ne_v4f32(i32
}
; CHECK-LABEL: select_eq_v4f32:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_eq_v4f32 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -388,8 +363,7 @@ define <4 x float> @select_eq_v4f32(i32
; 2 x double
; ==============================================================================
; CHECK-LABEL: vselect_v2f64:
-; CHECK-NEXT: .param v128, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype vselect_v2f64 (v128, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 63{{$}}
; CHECK-NEXT: i64x2.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 63{{$}}
@@ -402,8 +376,7 @@ define <2 x double> @vselect_v2f64(<2 x
}
; CHECK-LABEL: select_v2f64:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_v2f64 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -416,8 +389,7 @@ define <2 x double> @select_v2f64(i1 %c,
}
; CHECK-LABEL: select_cmp_v2f64:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_cmp_v2f64 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 0{{$}}
@@ -433,8 +405,7 @@ define <2 x double> @select_cmp_v2f64(i3
}
; CHECK-LABEL: select_ne_v2f64:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_ne_v2f64 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
@@ -448,8 +419,7 @@ define <2 x double> @select_ne_v2f64(i32
}
; CHECK-LABEL: select_eq_v2f64:
-; CHECK-NEXT: .param i32, v128, v128{{$}}
-; CHECK-NEXT: .result v128{{$}}
+; CHECK-NEXT: .functype select_eq_v2f64 (i32, v128, v128) -> (v128){{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, -1{{$}}
; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd-sext-inreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-sext-inreg.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-sext-inreg.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-sext-inreg.ll Mon Nov 19 09:10:36 2018
@@ -9,8 +9,7 @@ target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sext_inreg_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sext_inreg_v16i8 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[T0:[0-9]+]]=, 7{{$}}
; SIMD128-NEXT: i8x16.shl $push[[T1:[0-9]+]]=, $0, $pop[[T0]]{{$}}
; SIMD128-NEXT: i32.const $push[[T2:[0-9]+]]=, 7{{$}}
@@ -23,8 +22,7 @@ define <16 x i8> @sext_inreg_v16i8(<16 x
; CHECK-LABEL: sext_inreg_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sext_inreg_v8i16 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[T0:[0-9]+]]=, 15{{$}}
; SIMD128-NEXT: i16x8.shl $push[[T1:[0-9]+]]=, $0, $pop[[T0]]{{$}}
; SIMD128-NEXT: i32.const $push[[T2:[0-9]+]]=, 15{{$}}
@@ -37,8 +35,7 @@ define <8 x i16> @sext_inreg_v8i16(<8 x
; CHECK-LABEL: sext_inreg_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sext_inreg_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[T0:[0-9]+]]=, 31{{$}}
; SIMD128-NEXT: i32x4.shl $push[[T1:[0-9]+]]=, $0, $pop[[T0]]{{$}}
; SIMD128-NEXT: i32.const $push[[T2:[0-9]+]]=, 31{{$}}
@@ -52,8 +49,7 @@ define <4 x i32> @sext_inreg_v4i32(<4 x
; CHECK-LABEL: sext_inreg_v2i64:
; NO-SIMD128-NOT: i64x2
; SDIM128-VM-NOT: i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype sext_inreg_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32.const $push[[T0:[0-9]+]]=, 63{{$}}
; SIMD128-NEXT: i64x2.shl $push[[T1:[0-9]+]]=, $0, $pop[[T0]]{{$}}
; SIMD128-NEXT: i32.const $push[[T2:[0-9]+]]=, 63{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/simd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd.ll Mon Nov 19 09:10:36 2018
@@ -12,7 +12,7 @@ target triple = "wasm32-unknown-unknown"
; ==============================================================================
; CHECK-LABEL: const_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype const_v16i8 () -> (v128){{$}}
; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -23,8 +23,7 @@ define <16 x i8> @const_v16i8() {
; CHECK-LABEL: splat_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype splat_v16i8 (i32) -> (v128){{$}}
; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @splat_v16i8(i8 %x) {
@@ -44,8 +43,7 @@ define <16 x i8> @const_splat_v16i8() {
; CHECK-LABEL: extract_v16i8_s:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_v16i8_s (v128) -> (i32){{$}}
; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_v16i8_s(<16 x i8> %v) {
@@ -56,8 +54,7 @@ define i32 @extract_v16i8_s(<16 x i8> %v
; CHECK-LABEL: extract_var_v16i8_s:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_var_v16i8_s (v128, i32) -> (i32){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
@@ -76,8 +73,7 @@ define i32 @extract_var_v16i8_s(<16 x i8
; CHECK-LABEL: extract_undef_v16i8_s:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_undef_v16i8_s (v128) -> (i32){{$}}
; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_undef_v16i8_s(<16 x i8> %v) {
@@ -88,8 +84,7 @@ define i32 @extract_undef_v16i8_s(<16 x
; CHECK-LABEL: extract_v16i8_u:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_v16i8_u (v128) -> (i32){{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_v16i8_u(<16 x i8> %v) {
@@ -100,8 +95,7 @@ define i32 @extract_v16i8_u(<16 x i8> %v
; CHECK-LABEL: extract_var_v16i8_u:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_var_v16i8_u (v128, i32) -> (i32){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -120,8 +114,7 @@ define i32 @extract_var_v16i8_u(<16 x i8
; CHECK-LABEL: extract_undef_v16i8_u:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_undef_v16i8_u (v128) -> (i32){{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_undef_v16i8_u(<16 x i8> %v) {
@@ -132,8 +125,7 @@ define i32 @extract_undef_v16i8_u(<16 x
; CHECK-LABEL: extract_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_v16i8 (v128) -> (i32){{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i8 @extract_v16i8(<16 x i8> %v) {
@@ -143,8 +135,7 @@ define i8 @extract_v16i8(<16 x i8> %v) {
; CHECK-LABEL: extract_var_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_var_v16i8 (v128, i32) -> (i32){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -162,8 +153,7 @@ define i8 @extract_var_v16i8(<16 x i8> %
; CHECK-LABEL: extract_undef_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_undef_v16i8 (v128) -> (i32){{$}}
; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i8 @extract_undef_v16i8(<16 x i8> %v) {
@@ -173,8 +163,7 @@ define i8 @extract_undef_v16i8(<16 x i8>
; CHECK-LABEL: replace_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_v16i8 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
@@ -184,8 +173,7 @@ define <16 x i8> @replace_v16i8(<16 x i8
; CHECK-LABEL: replace_var_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_var_v16i8 (v128, i32, i32) -> (v128){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -204,8 +192,7 @@ define <16 x i8> @replace_var_v16i8(<16
; CHECK-LABEL: replace_undef_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_undef_v16i8 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <16 x i8> @replace_undef_v16i8(<16 x i8> %v, i8 %x) {
@@ -215,8 +202,7 @@ define <16 x i8> @replace_undef_v16i8(<1
; CHECK-LABEL: shuffle_v16i8:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -229,8 +215,7 @@ define <16 x i8> @shuffle_v16i8(<16 x i8
; CHECK-LABEL: shuffle_undef_v16i8:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_undef_v16i8 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -245,8 +230,7 @@ define <16 x i8> @shuffle_undef_v16i8(<1
; CHECK-LABEL: build_v16i8:
; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype build_v16i8 (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}}
; SIMD128-NEXT: i8x16.splat $push[[L0:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: i8x16.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
; SIMD128-NEXT: i8x16.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
@@ -292,7 +276,7 @@ define <16 x i8> @build_v16i8(i8 %x0, i8
; ==============================================================================
; CHECK-LABEL: const_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype const_v8i16 () -> (v128){{$}}
; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @const_v8i16() {
@@ -302,8 +286,7 @@ define <8 x i16> @const_v8i16() {
; CHECK-LABEL: splat_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype splat_v8i16 (i32) -> (v128){{$}}
; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @splat_v8i16(i16 %x) {
@@ -321,8 +304,7 @@ define <8 x i16> @const_splat_v8i16() {
; CHECK-LABEL: extract_v8i16_s:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_v8i16_s (v128) -> (i32){{$}}
; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_v8i16_s(<8 x i16> %v) {
@@ -333,8 +315,7 @@ define i32 @extract_v8i16_s(<8 x i16> %v
; CHECK-LABEL: extract_var_v8i16_s:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_var_v8i16_s (v128, i32) -> (i32){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -355,8 +336,7 @@ define i32 @extract_var_v8i16_s(<8 x i16
; CHECK-LABEL: extract_undef_v8i16_s:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_undef_v8i16_s (v128) -> (i32){{$}}
; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_undef_v8i16_s(<8 x i16> %v) {
@@ -367,8 +347,7 @@ define i32 @extract_undef_v8i16_s(<8 x i
; CHECK-LABEL: extract_v8i16_u:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_v8i16_u (v128) -> (i32){{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_v8i16_u(<8 x i16> %v) {
@@ -379,8 +358,7 @@ define i32 @extract_v8i16_u(<8 x i16> %v
; CHECK-LABEL: extract_var_v8i16_u:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_var_v8i16_u (v128, i32) -> (i32){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -401,8 +379,7 @@ define i32 @extract_var_v8i16_u(<8 x i16
; CHECK-LABEL: extract_undef_v8i16_u:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_undef_v8i16_u (v128) -> (i32){{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_undef_v8i16_u(<8 x i16> %v) {
@@ -413,8 +390,7 @@ define i32 @extract_undef_v8i16_u(<8 x i
; CHECK-LABEL: extract_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_v8i16 (v128) -> (i32){{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i16 @extract_v8i16(<8 x i16> %v) {
@@ -424,8 +400,7 @@ define i16 @extract_v8i16(<8 x i16> %v)
; CHECK-LABEL: extract_var_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_var_v8i16 (v128, i32) -> (i32){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -445,8 +420,7 @@ define i16 @extract_var_v8i16(<8 x i16>
; CHECK-LABEL: extract_undef_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_undef_v8i16 (v128) -> (i32){{$}}
; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i16 @extract_undef_v8i16(<8 x i16> %v) {
@@ -456,8 +430,7 @@ define i16 @extract_undef_v8i16(<8 x i16
; CHECK-LABEL: replace_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_v8i16 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
@@ -467,8 +440,7 @@ define <8 x i16> @replace_v8i16(<8 x i16
; CHECK-LABEL: replace_var_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_var_v8i16 (v128, i32, i32) -> (v128){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -489,8 +461,7 @@ define <8 x i16> @replace_var_v8i16(<8 x
; CHECK-LABEL: replace_undef_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_undef_v8i16 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <8 x i16> @replace_undef_v8i16(<8 x i16> %v, i16 %x) {
@@ -500,8 +471,7 @@ define <8 x i16> @replace_undef_v8i16(<8
; CHECK-LABEL: shuffle_v8i16:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -513,8 +483,7 @@ define <8 x i16> @shuffle_v8i16(<8 x i16
; CHECK-LABEL: shuffle_undef_v8i16:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_undef_v8i16 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -527,8 +496,7 @@ define <8 x i16> @shuffle_undef_v8i16(<8
; CHECK-LABEL: build_v8i16:
; NO-SIMD128-NOT: i16x8
-; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype build_v8i16 (i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}}
; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
@@ -556,7 +524,7 @@ define <8 x i16> @build_v8i16(i16 %x0, i
; ==============================================================================
; CHECK-LABEL: const_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype const_v4i32 () -> (v128){{$}}
; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @const_v4i32() {
@@ -565,8 +533,7 @@ define <4 x i32> @const_v4i32() {
; CHECK-LABEL: splat_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype splat_v4i32 (i32) -> (v128){{$}}
; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @splat_v4i32(i32 %x) {
@@ -584,8 +551,7 @@ define <4 x i32> @const_splat_v4i32() {
; CHECK-LABEL: extract_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_v4i32 (v128) -> (i32){{$}}
; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_v4i32(<4 x i32> %v) {
@@ -595,8 +561,7 @@ define i32 @extract_v4i32(<4 x i32> %v)
; CHECK-LABEL: extract_var_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_var_v4i32 (v128, i32) -> (i32){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -616,8 +581,7 @@ define i32 @extract_var_v4i32(<4 x i32>
; CHECK-LABEL: extract_undef_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: .functype extract_undef_v4i32 (v128) -> (i32){{$}}
; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_undef_v4i32(<4 x i32> %v) {
@@ -627,8 +591,7 @@ define i32 @extract_undef_v4i32(<4 x i32
; CHECK-LABEL: replace_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_v4i32 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
@@ -638,8 +601,7 @@ define <4 x i32> @replace_v4i32(<4 x i32
; CHECK-LABEL: replace_var_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, i32, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_var_v4i32 (v128, i32, i32) -> (v128){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -660,8 +622,7 @@ define <4 x i32> @replace_var_v4i32(<4 x
; CHECK-LABEL: replace_undef_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_undef_v4i32 (v128, i32) -> (v128){{$}}
; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x i32> @replace_undef_v4i32(<4 x i32> %v, i32 %x) {
@@ -671,8 +632,7 @@ define <4 x i32> @replace_undef_v4i32(<4
; CHECK-LABEL: shuffle_v4i32:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -684,8 +644,7 @@ define <4 x i32> @shuffle_v4i32(<4 x i32
; CHECK-LABEL: shuffle_undef_v4i32:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_undef_v4i32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -697,8 +656,7 @@ define <4 x i32> @shuffle_undef_v4i32(<4
; CHECK-LABEL: build_v4i32:
; NO-SIMD128-NOT: i32x4
-; SIMD128-NEXT: .param i32, i32, i32, i32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype build_v4i32 (i32, i32, i32, i32) -> (v128){{$}}
; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
@@ -718,7 +676,7 @@ define <4 x i32> @build_v4i32(i32 %x0, i
; CHECK-LABEL: const_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype const_v2i64 () -> (v128){{$}}
; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @const_v2i64() {
@@ -728,8 +686,7 @@ define <2 x i64> @const_v2i64() {
; CHECK-LABEL: splat_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param i64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype splat_v2i64 (i64) -> (v128){{$}}
; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @splat_v2i64(i64 %x) {
@@ -747,8 +704,7 @@ define <2 x i64> @const_splat_v2i64() {
; CHECK-LABEL: extract_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i64{{$}}
+; SIMD128-NEXT: .functype extract_v2i64 (v128) -> (i64){{$}}
; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i64 @extract_v2i64(<2 x i64> %v) {
@@ -758,8 +714,7 @@ define i64 @extract_v2i64(<2 x i64> %v)
; CHECK-LABEL: extract_var_v2i64:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result i64{{$}}
+; SIMD128-NEXT: .functype extract_var_v2i64 (v128, i32) -> (i64){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -780,8 +735,7 @@ define i64 @extract_var_v2i64(<2 x i64>
; CHECK-LABEL: extract_undef_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result i64{{$}}
+; SIMD128-NEXT: .functype extract_undef_v2i64 (v128) -> (i64){{$}}
; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define i64 @extract_undef_v2i64(<2 x i64> %v) {
@@ -792,8 +746,7 @@ define i64 @extract_undef_v2i64(<2 x i64
; CHECK-LABEL: replace_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param v128, i64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_v2i64 (v128, i64) -> (v128){{$}}
; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
@@ -804,8 +757,7 @@ define <2 x i64> @replace_v2i64(<2 x i64
; CHECK-LABEL: replace_var_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param v128, i32, i64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_var_v2i64 (v128, i32, i64) -> (v128){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -827,8 +779,7 @@ define <2 x i64> @replace_var_v2i64(<2 x
; CHECK-LABEL: replace_undef_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param v128, i64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_undef_v2i64 (v128, i64) -> (v128){{$}}
; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @replace_undef_v2i64(<2 x i64> %v, i64 %x) {
@@ -838,8 +789,7 @@ define <2 x i64> @replace_undef_v2i64(<2
; CHECK-LABEL: shuffle_v2i64:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -850,8 +800,7 @@ define <2 x i64> @shuffle_v2i64(<2 x i64
; CHECK-LABEL: shuffle_undef_v2i64:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_undef_v2i64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -864,8 +813,7 @@ define <2 x i64> @shuffle_undef_v2i64(<2
; CHECK-LABEL: build_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-VM-NOT: i64x2
-; SIMD128-NEXT: .param i64, i64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype build_v2i64 (i64, i64) -> (v128){{$}}
; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -880,7 +828,7 @@ define <2 x i64> @build_v2i64(i64 %x0, i
; ==============================================================================
; CHECK-LABEL: const_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype const_v4f32 () -> (v128){{$}}
; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=,
; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -891,8 +839,7 @@ define <4 x float> @const_v4f32() {
; CHECK-LABEL: splat_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param f32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype splat_v4f32 (f32) -> (v128){{$}}
; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @splat_v4f32(float %x) {
@@ -910,8 +857,7 @@ define <4 x float> @const_splat_v4f32()
; CHECK-LABEL: extract_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result f32{{$}}
+; SIMD128-NEXT: .functype extract_v4f32 (v128) -> (f32){{$}}
; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define float @extract_v4f32(<4 x float> %v) {
@@ -921,8 +867,7 @@ define float @extract_v4f32(<4 x float>
; CHECK-LABEL: extract_var_v4f32:
; NO-SIMD128-NOT: i64x2
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result f32{{$}}
+; SIMD128-NEXT: .functype extract_var_v4f32 (v128, i32) -> (f32){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -942,8 +887,7 @@ define float @extract_var_v4f32(<4 x flo
; CHECK-LABEL: extract_undef_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result f32{{$}}
+; SIMD128-NEXT: .functype extract_undef_v4f32 (v128) -> (f32){{$}}
; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define float @extract_undef_v4f32(<4 x float> %v) {
@@ -953,8 +897,7 @@ define float @extract_undef_v4f32(<4 x f
; CHECK-LABEL: replace_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, f32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_v4f32 (v128, f32) -> (v128){{$}}
; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
@@ -964,8 +907,7 @@ define <4 x float> @replace_v4f32(<4 x f
; CHECK-LABEL: replace_var_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, i32, f32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_var_v4f32 (v128, i32, f32) -> (v128){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -986,8 +928,7 @@ define <4 x float> @replace_var_v4f32(<4
; CHECK-LABEL: replace_undef_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param v128, f32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_undef_v4f32 (v128, f32) -> (v128){{$}}
; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <4 x float> @replace_undef_v4f32(<4 x float> %v, float %x) {
@@ -997,8 +938,7 @@ define <4 x float> @replace_undef_v4f32(
; CHECK-LABEL: shuffle_v4f32:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1010,8 +950,7 @@ define <4 x float> @shuffle_v4f32(<4 x f
; CHECK-LABEL: shuffle_undef_v4f32:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_undef_v4f32 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1023,8 +962,7 @@ define <4 x float> @shuffle_undef_v4f32(
; CHECK-LABEL: build_v4f32:
; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .param f32, f32, f32, f32{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype build_v4f32 (f32, f32, f32, f32) -> (v128){{$}}
; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}}
@@ -1043,7 +981,7 @@ define <4 x float> @build_v4f32(float %x
; ==============================================================================
; CHECK-LABEL: const_v2f64:
; NO-SIMD128-NOT: f64x2
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype const_v2f64 () -> (v128){{$}}
; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @const_v2f64() {
@@ -1053,8 +991,7 @@ define <2 x double> @const_v2f64() {
; CHECK-LABEL: splat_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param f64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype splat_v2f64 (f64) -> (v128){{$}}
; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @splat_v2f64(double %x) {
@@ -1072,8 +1009,7 @@ define <2 x double> @const_splat_v2f64()
; CHECK-LABEL: extract_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result f64{{$}}
+; SIMD128-NEXT: .functype extract_v2f64 (v128) -> (f64){{$}}
; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define double @extract_v2f64(<2 x double> %v) {
@@ -1083,8 +1019,7 @@ define double @extract_v2f64(<2 x double
; CHECK-LABEL: extract_var_v2f64:
; NO-SIMD128-NOT: i62x2
-; SIMD128-NEXT: .param v128, i32{{$}}
-; SIMD128-NEXT: .result f64{{$}}
+; SIMD128-NEXT: .functype extract_var_v2f64 (v128, i32) -> (f64){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -1105,8 +1040,7 @@ define double @extract_var_v2f64(<2 x do
; CHECK-LABEL: extract_undef_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128{{$}}
-; SIMD128-NEXT: .result f64{{$}}
+; SIMD128-NEXT: .functype extract_undef_v2f64 (v128) -> (f64){{$}}
; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define double @extract_undef_v2f64(<2 x double> %v) {
@@ -1117,8 +1051,7 @@ define double @extract_undef_v2f64(<2 x
; CHECK-LABEL: replace_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, f64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_v2f64 (v128, f64) -> (v128){{$}}
; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
@@ -1129,8 +1062,7 @@ define <2 x double> @replace_v2f64(<2 x
; CHECK-LABEL: replace_var_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, i32, f64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_var_v2f64 (v128, i32, f64) -> (v128){{$}}
; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer at GLOBAL{{$}}
; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
@@ -1152,8 +1084,7 @@ define <2 x double> @replace_var_v2f64(<
; CHECK-LABEL: replace_undef_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param v128, f64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype replace_undef_v2f64 (v128, f64) -> (v128){{$}}
; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @replace_undef_v2f64(<2 x double> %v, double %x) {
@@ -1163,8 +1094,7 @@ define <2 x double> @replace_undef_v2f64
; CHECK-LABEL: shuffle_v2f64:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1176,8 +1106,7 @@ define <2 x double> @shuffle_v2f64(<2 x
; CHECK-LABEL: shuffle_undef_v2f64:
; NO-SIMD128-NOT: v8x16
-; SIMD128-NEXT: .param v128, v128{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype shuffle_undef_v2f64 (v128, v128) -> (v128){{$}}
; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
@@ -1190,8 +1119,7 @@ define <2 x double> @shuffle_undef_v2f64
; CHECK-LABEL: build_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-VM-NOT: f64x2
-; SIMD128-NEXT: .param f64, f64{{$}}
-; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: .functype build_v2f64 (f64, f64) -> (v128){{$}}
; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/store.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/store.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/store.ll Mon Nov 19 09:10:36 2018
@@ -7,7 +7,7 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sti32:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype sti32 (i32, i32) -> (){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.store 0($pop[[L0]]), $pop[[L1]]{{$}}
@@ -18,7 +18,7 @@ define void @sti32(i32 *%p, i32 %v) {
}
; CHECK-LABEL: sti64:
-; CHECK-NEXT: .param i32, i64{{$}}
+; CHECK-NEXT: .functype sti64 (i32, i64) -> (){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.store 0($pop[[L0]]), $pop[[L1]]{{$}}
@@ -29,7 +29,7 @@ define void @sti64(i64 *%p, i64 %v) {
}
; CHECK-LABEL: stf32:
-; CHECK-NEXT: .param i32, f32{{$}}
+; CHECK-NEXT: .functype stf32 (i32, f32) -> (){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.store 0($pop[[L0]]), $pop[[L1]]{{$}}
@@ -40,7 +40,7 @@ define void @stf32(float *%p, float %v)
}
; CHECK-LABEL: stf64:
-; CHECK-NEXT: .param i32, f64{{$}}
+; CHECK-NEXT: .functype stf64 (i32, f64) -> (){{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.store 0($pop[[L0]]), $pop[[L1]]{{$}}
Modified: llvm/trunk/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll Mon Nov 19 09:10:36 2018
@@ -10,7 +10,7 @@ declare i32 @has_i64_arg(i64)
declare i32 @has_ptr_arg(i8*)
; CHECK-LABEL: test_invalid_rtn:
-; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: i32.call $push[[L1:[0-9]+]]=, .Lhas_i64_arg_bitcast_invalid.2 at FUNCTION, $pop[[L0]]{{$}}
; CHECK-NEXT: drop $pop[[L1]]{{$}}
; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, 0{{$}}
@@ -32,7 +32,7 @@ define void @test_struct_rtn() {
}
; CHECK-LABEL: test_invalid_arg:
-; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 2{{$}}
+; CHECK: i32.const $push[[L0:[0-9]+]]=, 2{{$}}
; CHECK-NEXT: i32.call $push[[L1:[0-9]+]]=, .Lhas_ptr_arg_bitcast_invalid.4 at FUNCTION, $pop[[L0]]{{$}}
; CHECK-NEXT: drop $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 2{{$}}
@@ -51,25 +51,21 @@ entry:
}
; CHECK-LABEL: .Lhas_i64_arg_bitcast_invalid:
-; CHECK-NEXT: .param i64
-; CHECK-NEXT: .result i64
+; CHECK-NEXT: .functype .Lhas_i64_arg_bitcast_invalid (i64) -> (i64)
; CHECK-NEXT: unreachable
; CHECK-NEXT: end_function
; CHECK-LABEL: .Lhas_i64_arg_bitcast_invalid.2:
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .functype .Lhas_i64_arg_bitcast_invalid.2 (i32) -> (i32)
; CHECK-NEXT: unreachable
; CHECK-NEXT: end_function
; CHECK-LABEL: .Lhas_ptr_arg_bitcast_invalid:
-; CHECK-NEXT: .param i64
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .functype .Lhas_ptr_arg_bitcast_invalid (i64) -> (i32)
; CHECK-NEXT: unreachable
; CHECK-NEXT: end_function
; CHECK-LABEL: .Lhas_ptr_arg_bitcast_invalid.4:
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .functype .Lhas_ptr_arg_bitcast_invalid.4 (i32) -> (i32)
; CHECK-NEXT: unreachable
; CHECK-NEXT: end_function
Modified: llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll Mon Nov 19 09:10:36 2018
@@ -6,23 +6,21 @@ target datalayout = "e-m:e-p:32:32-i64:6
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: unused_first:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype unused_first (i32, i32) -> (i32){{$}}
; CHECK-NEXT: return $1{{$}}
define i32 @unused_first(i32 %x, i32 %y) {
ret i32 %y
}
; CHECK-LABEL: unused_second:
-; CHECK-NEXT: .param i32, i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype unused_second (i32, i32) -> (i32){{$}}
; CHECK-NEXT: return $0{{$}}
define i32 @unused_second(i32 %x, i32 %y) {
ret i32 %x
}
; CHECK-LABEL: call_something:
-; CHECK-NEXT: {{^}} i32.call $drop=, return_something at FUNCTION{{$}}
+; CHECK: {{^}} i32.call $drop=, return_something at FUNCTION{{$}}
; CHECK-NEXT: return{{$}}
declare i32 @return_something()
define void @call_something() {
Modified: llvm/trunk/test/CodeGen/WebAssembly/userstack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/userstack.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/userstack.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/userstack.ll Mon Nov 19 09:10:36 2018
@@ -309,7 +309,7 @@ define void @frameaddress_0() {
; Test __builtin_frame_address(1).
; CHECK-LABEL: frameaddress_1:
-; CHECK-NEXT: i32.const $push0=, 0{{$}}
+; CHECK: i32.const $push0=, 0{{$}}
; CHECK-NEXT: call use_i8_star at FUNCTION, $pop0{{$}}
; CHECK-NEXT: return{{$}}
define void @frameaddress_1() {
Modified: llvm/trunk/test/CodeGen/WebAssembly/varargs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/varargs.ll?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/varargs.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/varargs.ll Mon Nov 19 09:10:36 2018
@@ -9,7 +9,7 @@ target triple = "wasm32-unknown-unknown"
; TODO: Test va_start.
; CHECK-LABEL: start:
-; CHECK-NEXT: .param i32, i32
+; CHECK-NEXT: .functype start (i32, i32) -> ()
; CHECK-NOT: __stack_pointer
define void @start(i8** %ap, ...) {
entry:
@@ -23,7 +23,7 @@ entry:
; Test va_end.
; CHECK-LABEL: end:
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .functype end (i32) -> (){{$}}
; CHECK-NEXT: return{{$}}
define void @end(i8** %ap) {
entry:
@@ -35,7 +35,7 @@ entry:
; Test va_copy.
; CHECK-LABEL: copy:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype copy (i32, i32) -> (){{$}}
; CHECK-NEXT: i32.load $push0=, 0($1){{$}}
; CHECK-NEXT: i32.store 0($0), $pop0{{$}}
; CHECK-NEXT: return{{$}}
@@ -50,8 +50,7 @@ entry:
; Test va_arg with an i8 argument.
; CHECK-LABEL: arg_i8:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype arg_i8 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $1=, $pop[[NUM0]]{{$}}
; CHECK-NEXT: i32.const $push[[NUM2:[0-9]+]]=, 4{{$}}
@@ -68,8 +67,7 @@ entry:
; Test va_arg with an i32 argument.
; CHECK-LABEL: arg_i32:
-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .functype arg_i32 (i32) -> (i32){{$}}
; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($0){{$}}
; CHECK-NEXT: i32.const $push[[NUM1:[0-9]+]]=, 3{{$}}
; CHECK-NEXT: i32.add $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
@@ -90,7 +88,7 @@ entry:
; Test va_arg with an i128 argument.
; CHECK-LABEL: arg_i128:
-; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .functype arg_i128 (i32, i32) -> (){{$}}
; CHECK: i32.and
; CHECK: i64.load
; CHECK: i64.load
@@ -106,7 +104,7 @@ entry:
declare void @callee(...)
; CHECK-LABEL: caller_none:
-; CHECK-NEXT: i32.const $push0=, 0
+; CHECK: i32.const $push0=, 0
; CHECK-NEXT: call callee at FUNCTION, $pop0
; CHECK-NEXT: return{{$}}
define void @caller_none() {
@@ -129,7 +127,7 @@ define void @caller_some() {
; Test a va_start call in a non-entry block
; CHECK-LABEL: startbb:
-; CHECK: .param i32, i32, i32
+; CHECK: .functype startbb (i32, i32, i32) -> ()
define void @startbb(i1 %cond, i8** %ap, ...) {
entry:
br i1 %cond, label %bb0, label %bb1
@@ -160,7 +158,7 @@ define void @call_nonlegal_fixed() nounw
; Test a definition a varargs function with a non-legal fixed argument.
; CHECK-LABEL: nonlegal_fixed:
-; CHECK-NEXT: .param i64, i64, i32{{$}}
+; CHECK-NEXT: .functype nonlegal_fixed (i64, i64, i32) -> (){{$}}
define void @nonlegal_fixed(fp128 %x, ...) nounwind {
ret void
}
Modified: llvm/trunk/test/MC/WebAssembly/basic-assembly.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/WebAssembly/basic-assembly.s?rev=347228&r1=347227&r2=347228&view=diff
==============================================================================
--- llvm/trunk/test/MC/WebAssembly/basic-assembly.s (original)
+++ llvm/trunk/test/MC/WebAssembly/basic-assembly.s Mon Nov 19 09:10:36 2018
@@ -7,8 +7,7 @@
.type test0, at function
test0:
# Test all types:
- .param i32, i64
- .result i32
+ .functype test0 (i32, i64) -> (i32)
.local f32, f64, v128, v128
# Explicit getlocal/setlocal:
get_local 2
@@ -66,8 +65,7 @@ test0:
# CHECK: .text
# CHECK-LABEL: test0:
-# CHECK-NEXT: .param i32, i64
-# CHECK-NEXT: .result i32
+# CHECK-NEXT: .functype test0 (i32, i64) -> (i32)
# CHECK-NEXT: .local f32, f64
# CHECK-NEXT: get_local 2
# CHECK-NEXT: set_local 2
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