[PATCH] D54225: AMDGPU/InsertWaitcnts: Some more const-correctness
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Mon Nov 19 04:07:40 PST 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL347192: AMDGPU/InsertWaitcnts: Some more const-correctness (authored by nha, committed by ).
Repository:
rL LLVM
https://reviews.llvm.org/D54225
Files:
llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Index: llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -178,14 +178,14 @@
}
}
- int32_t getScoreLB(InstCounterType T) {
+ int32_t getScoreLB(InstCounterType T) const {
assert(T < NUM_INST_CNTS);
if (T >= NUM_INST_CNTS)
return 0;
return ScoreLBs[T];
}
- int32_t getScoreUB(InstCounterType T) {
+ int32_t getScoreUB(InstCounterType T) const {
assert(T < NUM_INST_CNTS);
if (T >= NUM_INST_CNTS)
return 0;
@@ -268,7 +268,7 @@
return EventUBs[W];
}
- bool counterOutOfOrder(InstCounterType T);
+ bool counterOutOfOrder(InstCounterType T) const;
unsigned int updateByWait(InstCounterType T, int ScoreToWait);
void updateByEvent(const SIInstrInfo *TII, const SIRegisterInfo *TRI,
const MachineRegisterInfo *MRI, WaitEventType E,
@@ -755,7 +755,7 @@
// Where there are multiple types of event in the bracket of a counter,
// the decrement may go out of order.
-bool BlockWaitcntBrackets::counterOutOfOrder(InstCounterType T) {
+bool BlockWaitcntBrackets::counterOutOfOrder(InstCounterType T) const {
switch (T) {
case VM_CNT:
return false;
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