[PATCH] D54668: [X86] Attempt to improve v32i8/v64i8 multiply lowering by applying the v16i8 non-avx2 algorithm to each 128-bit lane.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 174559.
craig.topper added a comment.

Rebase


Repository:
  rL LLVM

https://reviews.llvm.org/D54668

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avx2-arith.ll
  test/CodeGen/X86/min-legal-vector-width.ll
  test/CodeGen/X86/pmul.ll
  test/CodeGen/X86/prefer-avx256-wide-mul.ll
  test/CodeGen/X86/vector-mul.ll
  test/CodeGen/X86/vector-reduce-mul.ll

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