[PATCH] D54596: [X86] Remove ANY_EXTEND special case from canReduceVMulWidth
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 15 12:22:07 PST 2018
craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel.
Removing this code doesn't affect any lit tests so it doesn't appear to be tested anymore. I assume it was when it was added, but I guess something else changed?
I mostly didn't like that it seemed to count the sign bits as if it was a sign_extend, but then set isPositive as if it was a zero_extend. It feels like we should have picked one interpretation?
https://reviews.llvm.org/D54596
Files:
lib/Target/X86/X86ISelLowering.cpp
Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -34337,24 +34337,8 @@
for (unsigned i = 0; i < 2; i++) {
SDValue Opd = N->getOperand(i);
- // DAG.ComputeNumSignBits return 1 for ISD::ANY_EXTEND, so we need to
- // compute signbits for it separately.
- if (Opd.getOpcode() == ISD::ANY_EXTEND) {
- // For anyextend, it is safe to assume an appropriate number of leading
- // sign/zero bits.
- if (Opd.getOperand(0).getValueType().getVectorElementType() == MVT::i8)
- SignBits[i] = 25;
- else if (Opd.getOperand(0).getValueType().getVectorElementType() ==
- MVT::i16)
- SignBits[i] = 17;
- else
- return false;
- IsPositive[i] = true;
- } else {
- SignBits[i] = DAG.ComputeNumSignBits(Opd);
- if (DAG.SignBitIsZero(Opd))
- IsPositive[i] = true;
- }
+ SignBits[i] = DAG.ComputeNumSignBits(Opd);
+ IsPositive[i] = DAG.SignBitIsZero(Opd);
}
bool AllPositive = IsPositive[0] && IsPositive[1];
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