[PATCH] D54583: PowerPC: Optimize SPE double parameter calling setup

[Justin Hibbits via Phabricator via llvm-commits]

jhibbits created this revision.
jhibbits added reviewers: nemanjai, hfinkel, joerg.
Herald added subscribers: llvm-commits, jsji, jfb, kbarton.

SPE passes doubles the same as soft-float, in register pairs as i32
types.  This is all handled by the target-independent layer.  However,
this is not optimal when splitting or reforming the doubles, as it
pushes to the stack and loads from, on either side.

For instance, to pass a double argument to a function, assuming the
double value is in r5, the sequence currently looks like this:

  evstdd      5, X(1)
  lwz         3, X(1)
  lwz         4, X+4(1)

Likewise, to form a double into r5 from args in r3 and r4:

  stw         3, X(1)
  stw         4, X+4(1)
  evldd       5, X(1)

This optimizes the fence to use SPE instructions.  Now, to pass a double
to a function:

  mr          4, 5
  evmergehi   3, 5, 5

And to form a double into r5 from args in r3 and r4:

  evmergelo   5, 3, 4

This is comparable to the way that gcc generates the double splits.


Repository:
  rL LLVM

https://reviews.llvm.org/D54583

Files:
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCISelLowering.h
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCInstrSPE.td
  test/CodeGen/PowerPC/spe.ll

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