[PATCH] D53235: [RISCV] Add RV64F codegen support
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 15 03:56:20 PST 2018
asb updated this revision to Diff 174180.
asb marked an inline comment as done.
asb added a comment.
Refresh patch and fix typo in comment. This patch does not update float-intrinsics.ll as new promotion code needs to be added for FPOWI. I will post a patch to do this now.
https://reviews.llvm.org/D53235
Files:
lib/Target/RISCV/RISCVISelDAGToDAG.cpp
lib/Target/RISCV/RISCVISelLowering.cpp
lib/Target/RISCV/RISCVISelLowering.h
lib/Target/RISCV/RISCVInstrInfoF.td
test/CodeGen/RISCV/float-arith.ll
test/CodeGen/RISCV/float-br-fcmp.ll
test/CodeGen/RISCV/float-convert.ll
test/CodeGen/RISCV/float-fcmp.ll
test/CodeGen/RISCV/float-imm.ll
test/CodeGen/RISCV/float-mem.ll
test/CodeGen/RISCV/float-select-fcmp.ll
test/CodeGen/RISCV/rv64f-float-convert.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D53235.174180.patch
Type: text/x-patch
Size: 59949 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20181115/cd96a041/attachment.bin>
More information about the llvm-commits
mailing list