[PATCH] D54570: [DAGCombine] Fix non-deterministic debug output
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 15 01:00:56 PST 2018
samparker created this revision.
samparker added a reviewer: chh.
Herald added a subscriber: mgrang.
PR37970 reported non-deterministic debug output, this was caused by iterating through a set and not a a vector. Not sure how to test it, but I ran it locally 10 times with the provided reproducer and the issue seems to be resolved. @chh could you please confirm?
bugzilla: https://bugs.llvm.org/show_bug.cgi?id=37970
https://reviews.llvm.org/D54570
Files:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -528,7 +528,7 @@
EVT &MemVT, unsigned ShAmt = 0);
/// Used by BackwardsPropagateMask to find suitable loads.
- bool SearchForAndLoads(SDNode *N, SmallPtrSetImpl<LoadSDNode*> &Loads,
+ bool SearchForAndLoads(SDNode *N, SmallVectorImpl<LoadSDNode*> &Loads,
SmallPtrSetImpl<SDNode*> &NodesWithConsts,
ConstantSDNode *Mask, SDNode *&NodeToMask);
/// Attempt to propagate a given AND node back to load leaves so that they
@@ -4213,7 +4213,7 @@
}
bool DAGCombiner::SearchForAndLoads(SDNode *N,
- SmallPtrSetImpl<LoadSDNode*> &Loads,
+ SmallVectorImpl<LoadSDNode*> &Loads,
SmallPtrSetImpl<SDNode*> &NodesWithConsts,
ConstantSDNode *Mask,
SDNode *&NodeToMask) {
@@ -4250,7 +4250,7 @@
// Use LE to convert equal sized loads to zext.
if (ExtVT.bitsLE(Load->getMemoryVT()))
- Loads.insert(Load);
+ Loads.push_back(Load);
continue;
}
@@ -4315,7 +4315,7 @@
if (isa<LoadSDNode>(N->getOperand(0)))
return false;
- SmallPtrSet<LoadSDNode*, 8> Loads;
+ SmallVector<LoadSDNode*, 8> Loads;
SmallPtrSet<SDNode*, 2> NodesWithConsts;
SDNode *FixupNode = nullptr;
if (SearchForAndLoads(N, Loads, NodesWithConsts, Mask, FixupNode)) {
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