[PATCH] D54546: [ARM] Don't expand sdiv
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 14 14:33:50 PST 2018
SjoerdMeijer created this revision.
SjoerdMeijer added reviewers: efriedma, dmgreen, samparker.
Herald added subscribers: chrib, kristof.beyls, javed.absar.
Don't expand a SDIV with an immediate that is a power of 2 if we optimise for minimum code size. For example:
sdiv %1, i32 4
this gets cleverly expanded to a sequence of 3 instructions: ASR, ADD (with a LSR in the addressing mode) and another ASR. But this is suboptimial for minimum code size, so instead we just generate a MOV and a SDIV.
https://reviews.llvm.org/D54546
Files:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
test/CodeGen/ARM/sdiv-opt-size.ll
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