[PATCH] D54095: [X86] X86DAGToDAGISel::matchBitExtract(): extract 'lshr' from `X`

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb added a comment.

In https://reviews.llvm.org/D54095#1298192, @lebedev.ri wrote:

> On these tests, i would even say this new `MOVZ`+`OR` variant is better..


It looks like the MOVZ is missing in various tests.
However, it shouldn't have been optimized out.

See for example your `@bextr64_d5_skipextrauses(i64 %val, i64 %numskipbits, i64 %numlowbits) `.
Here, the value of `numskipbits` (our %RSI) is unknown. We cannot safely assume that the upper 56-bits of `numskipbits` are cleared.
So, the OR instruction has to be preceeded by a zero-extend of %RSI.

If instead `%numskipbits` was declared as `i8 zeroext` instead of `i64`, then the compiler would know for sure that the upper bits are all zero, and we can just generate an OR.
I think the problem is that you are constructing a 8-bit quantity by inserting on an implicit definition, instead of a zero.


Repository:
  rL LLVM

https://reviews.llvm.org/D54095