[PATCH] D54433: [PowerPC][NFC] Macro for register set defs for the Asm Parser

[Jinsong Ji via Phabricator via llvm-commits]

jsji added inline comments.


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Comment at: lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp:62
 
 // FIXME: These can be generated by TableGen from the existing register
 // encoding values!
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nemanjai wrote:
> jsji wrote:
> > Looks like that it would be even better if we can generate all these by TableGen. 
> > 
> > DisassemblerEmitter.cpp is already generating differently for X86/WebAssembly/ARM, it should be fair for us to add PPC specific logic there. 
> We can look at doing this subsequently, but I believe that PPC has a bit of a unique situation in terms of complexity of register classes. So we would likely just be reimplementing the same thing in TableGen and it would only be used on PPC.
> There are arrays that are **nearly** what we want generated by TableGen, but those have two major issues with them:
> - Allocation order affects initialization order of the array
> - The arrays may contain arrays we don't want to assign in the assembler/disassembler (frame pointer, base pointer, ...)
OK for looking at this later.


Repository:
  rL LLVM

https://reviews.llvm.org/D54433