[PATCH] D48131: [RISCV] Implement codegen for cmpxchg on RV32IA
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 13 05:10:47 PST 2018
asb added inline comments.
================
Comment at: lib/Target/RISCV/RISCVInstrInfoA.td:263
+
+def PseudoMaskedCmpXchg32
+ : Pseudo<(outs GPR:$res, GPR:$scratch),
----------------
lewis-revill wrote:
> Is there a reason why this isn't first defined as a class independent of width, like `PseudoCmpXchg` is (and the other pseudos in this file for that matter)? I'm just thinking of what might be used in the RV64IA implementation.
The masked cmpxchg and atomicrmw are only useful for 1 and 2-byte accesses, so there's no need to ever produce a 64-bit masked cmpxchg or atomicrmw.
https://reviews.llvm.org/D48131
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