[PATCH] D52944: AMDGPU: Add llvm.amdgcn.ds.ordered.add & swap

[Marek Olšák via Phabricator via llvm-commits]

mareko added a comment.

In https://reviews.llvm.org/D52944#1260081, @nhaehnle wrote:

> In https://reviews.llvm.org/D52944#1259919, @arsenm wrote:
>
> > Does this need to be marked as isSourceOfDivergence?
>
>
> Now that you mention it, yes, even though it's for stupid reasons: I believe the ds_ordered_count instruction executes only in a single lane, so it's intuitively a uniform operation; however, it returns its result only in lane 0, so it's formally non-uniform.


ds_ordered_count hangs if more than 1 lane is active.

Would everybody tolerate "i32 m0" in the intrinsic?


Repository:
  rL LLVM

https://reviews.llvm.org/D52944