[llvm] r346661 - [VectorUtils] add funnel-shifts to the list of vectorizable intrinsics

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Mon Nov 12 07:20:14 2018
New Revision: 346661

URL: http://llvm.org/viewvc/llvm-project?rev=346661&view=rev
Log:
[VectorUtils] add funnel-shifts to the list of vectorizable intrinsics

This just identifies the intrinsics as candidates for vectorization.
It does not mean we will attempt to vectorize under normal conditions
(the test file is forcing vectorization). 

The cost model must be fixed to show that the transform is profitable 
in general.

Allowing vectorization with these intrinsics is required to avoid
potential regressions from canonicalizing to the intrinsics from
generic IR:
https://bugs.llvm.org/show_bug.cgi?id=37417


Modified:
    llvm/trunk/lib/Analysis/VectorUtils.cpp
    llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll

Modified: llvm/trunk/lib/Analysis/VectorUtils.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/VectorUtils.cpp?rev=346661&r1=346660&r2=346661&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/VectorUtils.cpp (original)
+++ llvm/trunk/lib/Analysis/VectorUtils.cpp Mon Nov 12 07:20:14 2018
@@ -47,6 +47,8 @@ bool llvm::isTriviallyVectorizable(Intri
   case Intrinsic::ctpop:
   case Intrinsic::ctlz:
   case Intrinsic::cttz:
+  case Intrinsic::fshl:
+  case Intrinsic::fshr:
   case Intrinsic::sqrt: // Begin floating-point.
   case Intrinsic::sin:
   case Intrinsic::cos:

Modified: llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll?rev=346661&r1=346660&r2=346661&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll (original)
+++ llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll Mon Nov 12 07:20:14 2018
@@ -1196,7 +1196,7 @@ declare i32 @llvm.fshl.i32 (i32, i32, i3
 
 define void @fshl_i32(i32 %n, i32* noalias %x, i32* noalias %y, i32 %shAmt) {
 ; CHECK-LABEL: @fshl_i32(
-; CHECK-NOT:     call <4 x i32> @llvm.fshl.v4i32(<4 x i32> [[WIDE_LOADX:%.*]], <4 x i32> [[WIDE_LOADY:%.*]], <4 x i32> [[SPLAT:%.*]])
+; CHECK:         call <4 x i32> @llvm.fshl.v4i32(<4 x i32> [[WIDE_LOADX:%.*]], <4 x i32> [[WIDE_LOADY:%.*]], <4 x i32> [[SPLAT:%.*]])
 ; CHECK:         ret void
 entry:
   %cmp = icmp sgt i32 %n, 0
@@ -1222,7 +1222,7 @@ declare i32 @llvm.fshr.i32 (i32, i32, i3
 
 define void @fshr_i32(i32 %n, i32* noalias %x, i32* noalias %y, i32 %shAmt) {
 ; CHECK-LABEL: @fshr_i32(
-; CHECK-NOT:     call <4 x i32> @llvm.fshr.v4i32(<4 x i32> [[WIDE_LOADX:%.*]], <4 x i32> [[WIDE_LOADY:%.*]], <4 x i32> [[SPLAT:%.*]])
+; CHECK:         call <4 x i32> @llvm.fshr.v4i32(<4 x i32> [[WIDE_LOADX:%.*]], <4 x i32> [[WIDE_LOADY:%.*]], <4 x i32> [[SPLAT:%.*]])
 ; CHECK:         ret void
 entry:
   %cmp = icmp sgt i32 %n, 0