[PATCH] D54276: [SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from LegalizeDAG to LegalizeVectorOps

Sat Nov 10 12:29:17 PST 2018

craig.topper updated this revision to Diff 173525.
craig.topper added a comment.

Handle AArch64 expansion with isel patterns instead of custom lowering. This prevents DAG combine from seeing the extract+build_vector opportunity.

Add a one use check to lowerShuffleVectorAsBroadcast in X86. This seems to reign in the aggressive broadcast formation. We now seem to be sharing constant pool entries a little better.

Repository:
  rL LLVM

https://reviews.llvm.org/D54276

Files:
  lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64InstrInfo.td
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/combine-udiv.ll
  test/CodeGen/X86/urem-seteq-vec-nonsplat.ll

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