[PATCH] D54128: Fix MachineInstr::findRegisterUseOperandIdx subreg checks

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added a comment.

The code change looks fine to me, but it should be possible to cleanup the test case a bit.



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Comment at: test/CodeGen/AMDGPU/optimize-if-exec-masking.mir:135-151
+  main_body:
+    %id = call i32 @llvm.amdgcn.workitem.id.x()
+    %cc = icmp eq i32 %id, 0
+    %0 = call { i1, i64 } @llvm.amdgcn.if(i1 %cc)
+    %1 = extractvalue { i1, i64 } %0, 0
+    %2 = extractvalue { i1, i64 } %0, 1
+    br i1 %1, label %if, label %end
----------------
It should be possible to remove most of the IR here.


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Comment at: test/CodeGen/AMDGPU/optimize-if-exec-masking.mir:760-781
+alignment:       0
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
----------------
It should be possible to remove most of this boilerplate.


https://reviews.llvm.org/D54128