[PATCH] D54308: [ARM] Don't promote i1 types in ARM CGP

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: SjoerdMeijer, dmgreen.
Herald added subscribers: chrib, kristof.beyls, javed.absar.

Now that we have mixed type sizes, i1 values need to be explicitly handled as we want to avoid promoting these values.


https://reviews.llvm.org/D54308

Files:
  lib/Target/ARM/ARMCodeGenPrepare.cpp
  test/CodeGen/ARM/CGP/arm-cgp-calls.ll
  test/CodeGen/ARM/CGP/arm-cgp-casts.ll


Index: test/CodeGen/ARM/CGP/arm-cgp-casts.ll
===================================================================
--- test/CodeGen/ARM/CGP/arm-cgp-casts.ll
+++ test/CodeGen/ARM/CGP/arm-cgp-casts.ll
@@ -582,3 +582,22 @@
   %retval = phi i8 [ 0, %entry ], [ %add, %if.then ]
   ret i8 %retval
 }
+
+define i32 @bitcast_i1(i16 zeroext %a, i32 %b, i32 %c) {
+entry:
+  %0 = bitcast i1 1 to i1
+  %1 = trunc i16 %a to i1
+  %cmp = icmp eq i1 %1, %0
+  br i1 %cmp, label %if.then, label %exit
+
+if.then:
+  %conv = zext i1 %0 to i16
+  %conv1 = zext i1 %1 to i16
+  %cmp1 = icmp uge i16 %conv, %conv1
+  %select = select i1 %cmp1, i32 %b, i32 %c
+  br label %exit
+
+exit:
+  %retval = phi i32 [ %select, %if.then ], [ 0, %entry ]
+  ret i32 %retval
+}
Index: test/CodeGen/ARM/CGP/arm-cgp-calls.ll
===================================================================
--- test/CodeGen/ARM/CGP/arm-cgp-calls.ll
+++ test/CodeGen/ARM/CGP/arm-cgp-calls.ll
@@ -177,6 +177,30 @@
   ret i1 %tobool
 }
 
+; CHECK-LABEL: i1_zeroext_call
+; CHECK: uxt
+define i1 @i1_zeroext_call(i16* %ts, i32 %a, i16* %b, i8* %c) {
+entry:
+  %0 = load i16, i16* %ts, align 2
+  %conv.i860 = trunc i32 %a to i16
+  store i16 %conv.i860, i16* %b, align 2
+  %call.i848 = call zeroext i1 @i1_zeroext(i8* %c, i32 64, i16 zeroext %conv.i860)
+  br i1 %call.i848, label %if.then223, label %if.else227
+
+if.then223:
+  %cmp235 = icmp eq i16 %0, %conv.i860
+  br label %exit
+
+if.else227:
+  %cmp236 = icmp ult i16 %0, %conv.i860
+  br label %exit
+
+exit:
+  %retval = phi i1 [ %cmp235, %if.then223 ], [ %cmp236, %if.else227 ]
+  ret i1 %retval
+}
+
+
 declare i32 @assert(...)
 declare i8 @dummy_i8(i8)
 declare i8 @dummy2(i8*, i8, i8)
@@ -191,3 +215,4 @@
 declare dso_local fastcc i64 @safe_sub_func_int64_t_s_s(i64, i64)
 declare dso_local fastcc zeroext i8 @safe_lshift_func(i8 zeroext, i32)
 declare dso_local fastcc zeroext i8 @safe_mul_func_uint8_t_u_u(i8 returned zeroext)
+declare i1 @i1_zeroext(i8*, i32, i16 zeroext)
Index: lib/Target/ARM/ARMCodeGenPrepare.cpp
===================================================================
--- lib/Target/ARM/ARMCodeGenPrepare.cpp
+++ lib/Target/ARM/ARMCodeGenPrepare.cpp
@@ -206,7 +206,8 @@
   if (auto *Ld = dyn_cast<LoadInst>(V))
     Ty = cast<PointerType>(Ld->getPointerOperandType())->getElementType();
 
-  if (!isa<IntegerType>(Ty))
+  if (!isa<IntegerType>(Ty) ||
+      cast<IntegerType>(V->getType())->getBitWidth() == 1)
     return false;
 
   return LessOrEqualTypeSize(V);
@@ -222,6 +223,7 @@
 static bool isSource(Value *V) {
   if (!isa<IntegerType>(V->getType()))
     return false;
+
   // TODO Allow zext to be sources.
   if (isa<Argument>(V))
     return true;


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