[PATCH] D54192: [ARM] Fix CPSR liveness in tMOVCCr_pseudo lowering.
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 7 12:17:02 PST 2018
efriedma added inline comments.
================
Comment at: test/CodeGen/ARM/wide-compares.ll:130
+define i64 @test_slt_select(i64 %c, i64 %d, i64 %a, i64 %b) {
+; CHECK-ARM-LABEL: test_slt_select:
+; CHECK-ARM: @ %bb.0: @ %entry
----------------
SjoerdMeijer wrote:
> My first impression of the tests was that they could benefit from a bit of a clean-up (stack offsets, register usage, asm comments, etc.). But looks like there are 2 schools of thoughts on this. One of them being that the output of the script is okay because it is explicit, shows everything, etc. So yeah, please ignore, whatever you think is appropriate.
The philosophy behind update_llc_test_checks.py is that the generated code for very small functions should change infrequently, and when it does change it's easy to update the CHECK lines by just calling update_llc_test_checks.py again.
Repository:
rL LLVM
https://reviews.llvm.org/D54192
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