[PATCH] D49200: [DAGCombine] Improve Load-Store Forwarding
Peter Smith via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 7 06:26:22 PST 2018
peter.smith added a comment.
This commit (found via git bisect) looks like it is the cause of https://bugs.llvm.org/show_bug.cgi?id=39571 which is derived from the Linux kernel and is a regression from LLVM 7.0. We get an internal fault in instruction selection for ARM state for pre ARM-v7 architectures (test uses armv4t but it is reproducible on v5t and v6).
A test case and details of how to reproduce can be found in the PR. It is possible that this has exposed a limitation in the Arm backend or the optimisation may not be suitable for it. Would you be able to take a look?
Repository:
rL LLVM
https://reviews.llvm.org/D49200
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