[PATCH] D53762: AMDGPU: Combine DPP mov with use instuctions (VOP1/2/3)

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: lib/Target/AMDGPU/GCNDPPCombine.cpp:350
+      // check if other than abs|neg modifiers are set (opsel for example)
+      const int64_t Mask = ~(SISrcMods::ABS | SISrcMods::NEG);
+      if (!hasNoImmOrEqual(OrigMI, AMDGPU::OpName::src0_modifiers, 0, Mask) ||
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rampitec wrote:
> AFAIR proper default value for opsel has 1 bit set (which means use high bits for high part).
After discussion that is not the case here. You cannot process VOP3P, so you do not have op_sel_hi for which default is 1. I.e. this mask is ok, just add a test with non-zero opsel.


Repository:
  rL LLVM

https://reviews.llvm.org/D53762