[llvm] r346026 - ARMExpandPseudoInsts: Fix CMP_SWAP expansion adding a kill flag to a def

[Matthias Braun via llvm-commits]

Author: matze
Date: Fri Nov  2 11:22:15 2018
New Revision: 346026

URL: http://llvm.org/viewvc/llvm-project?rev=346026&view=rev
Log:
ARMExpandPseudoInsts: Fix CMP_SWAP expansion adding a kill flag to a def

Added:
    llvm/trunk/test/CodeGen/ARM/cmpxchg.mir
Modified:
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=346026&r1=346025&r2=346026&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Fri Nov  2 11:22:15 2018
@@ -1030,10 +1030,10 @@ static void addExclusiveRegPair(MachineI
   if (IsThumb) {
     unsigned RegLo = TRI->getSubReg(Reg.getReg(), ARM::gsub_0);
     unsigned RegHi = TRI->getSubReg(Reg.getReg(), ARM::gsub_1);
-    MIB.addReg(RegLo, Flags | getKillRegState(Reg.isDead()));
-    MIB.addReg(RegHi, Flags | getKillRegState(Reg.isDead()));
+    MIB.addReg(RegLo, Flags);
+    MIB.addReg(RegHi, Flags);
   } else
-    MIB.addReg(Reg.getReg(), Flags | getKillRegState(Reg.isDead()));
+    MIB.addReg(Reg.getReg(), Flags);
 }
 
 /// Expand a 64-bit CMP_SWAP to an ldrexd/strexd loop.
@@ -1103,7 +1103,8 @@ bool ARMExpandPseudo::ExpandCMP_SWAP_64(
   //     bne .Lloadcmp
   unsigned STREXD = IsThumb ? ARM::t2STREXD : ARM::STREXD;
   MIB = BuildMI(StoreBB, DL, TII->get(STREXD), TempReg);
-  addExclusiveRegPair(MIB, New, 0, IsThumb, TRI);
+  unsigned Flags = getKillRegState(New.isDead());
+  addExclusiveRegPair(MIB, New, Flags, IsThumb, TRI);
   MIB.addReg(AddrReg).add(predOps(ARMCC::AL));
 
   unsigned CMPri = IsThumb ? ARM::t2CMPri : ARM::CMPri;

Added: llvm/trunk/test/CodeGen/ARM/cmpxchg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/cmpxchg.mir?rev=346026&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/cmpxchg.mir (added)
+++ llvm/trunk/test/CodeGen/ARM/cmpxchg.mir Fri Nov  2 11:22:15 2018
@@ -0,0 +1,24 @@
+# RUN: llc -o - %s -mtriple=armv7-unknown-linux-gnu -verify-machineinstrs -run-pass=arm-pseudo | FileCheck %s
+---
+# CHECK-LABEL: name: func
+name: func
+tracksRegLiveness: true
+body: |
+  bb.0:
+    liveins: $r0_r1, $r4_r5, $r3, $lr
+    dead early-clobber renamable $r0_r1, dead early-clobber renamable $r2 = CMP_SWAP_64 killed renamable $r3, killed renamable $r4_r5, renamable $r4_r5 :: (volatile load store monotonic monotonic 8)
+    ; CHECK: bb.0:
+    ; CHECK:   liveins: $r0_r1, $r4_r5, $r3, $lr
+    ; CHECK: bb.1:
+    ; CHEKC:   liveins: $r4_r5, $r3
+    ; CHECK:   $r0_r1 = LDREXD $r3, 14, $noreg
+    ; CHECK:   CMPrr killed $r0, $r4, 14, $noreg, implicit-def $cpsr
+    ; CHECK:   CMPrr killed $r1, $r5, 0, killed $cpsr, implicit-def $cpsr
+    ; CHECK:   Bcc %bb.3, 1, killed $cpsr
+    ; CHECK: bb.2:
+    ; CHECK:   liveins: $r4_r5, $r3
+    ; CHECK:   early-clobber $r2 = STREXD $r4_r5, $r3, 14, $noreg
+    ; CHECK:   CMPri killed $r2, 0, 14, $noreg, implicit-def $cpsr
+    ; CHECK:   Bcc %bb.1, 1, killed $cpsr
+    ; CHECK: bb.3:
+...