[PATCH] D50633: [AMDGPU] Add new Mode Register pass

[Brian Sumner via Phabricator via llvm-commits]

b-sumner added a comment.

Actually the conversions don't need non-default-rounded operations, nor are they required by OpenCL.  However, we've had requests to implement functions such as add_rtz(x,y) which computes x+y with round-to-zero rounding.   Our competitors offer such functions, and we implemented them for HSAIL.  So we are really trying to get back to parity with HSAIL.


Repository:
  rL LLVM

https://reviews.llvm.org/D50633