[PATCH] D53903: MachineOperand/MIParser: Do not print debug-use flag, infer it

Matthias Braun via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 30 15:13:28 PDT 2018


MatzeB created this revision.
MatzeB added a reviewer: thegameg.
Herald added subscribers: jsji, arphaman, atanasyan, jrtc27, aheejin, jgravelle-google, sbc100, javed.absar, nhaehnle, jvesely, nemanjai, sdardis, mcrosier, dschuff, qcolombet.

The debug-use flag must be set exactly for uses on DBG_VALUEs.  This is
so obvious that I we can trivially infer it while parsing. This will
reduce noise when printing while omitting an information that has very
little value to the user.

The parser will keep recognizing the flag for compatibility with old
mir files.


Repository:
  rL LLVM

https://reviews.llvm.org/D53903

Files:
  lib/CodeGen/MIRParser/MIParser.cpp
  lib/CodeGen/MachineOperand.cpp
  test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
  test/CodeGen/AArch64/GlobalISel/debug-insts.ll
  test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
  test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
  test/CodeGen/AArch64/phi-dbg.ll
  test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir
  test/CodeGen/AMDGPU/regcoalesce-dbg.mir
  test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
  test/CodeGen/ARM/ARMLoadStoreDBG.mir
  test/CodeGen/ARM/dbg-range-extension.mir
  test/CodeGen/ARM/sched-it-debug-nodes.mir
  test/CodeGen/Hexagon/early-if-debug.mir
  test/CodeGen/MIR/X86/diexpr-win32.mir
  test/CodeGen/MIR/X86/instructions-debug-location.mir
  test/CodeGen/MIR/X86/pr38773.mir
  test/CodeGen/PowerPC/debuginfo-split-int.ll
  test/CodeGen/PowerPC/debuginfo-stackarg.ll
  test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir
  test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
  test/CodeGen/X86/dbg-value-superreg-copy.mir
  test/CodeGen/X86/lea-opt-with-debug.mir
  test/CodeGen/X86/machine-cp-debug.mir
  test/CodeGen/X86/opt_phis.mir
  test/CodeGen/X86/post-ra-sched-with-debug.mir
  test/CodeGen/X86/postra-ignore-dbg-instrs.mir
  test/CodeGen/X86/shrink_wrap_dbg_value.mir
  test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.ll
  test/DebugInfo/ARM/sdag-split-arg1.ll
  test/DebugInfo/MIR/AArch64/clobber-sp.mir
  test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
  test/DebugInfo/MIR/ARM/split-superreg-complex.mir
  test/DebugInfo/MIR/ARM/split-superreg-piece.mir
  test/DebugInfo/MIR/ARM/split-superreg.mir
  test/DebugInfo/MIR/Mips/last-inst-bundled.mir
  test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
  test/DebugInfo/MIR/X86/bit-piece-dh.mir
  test/DebugInfo/MIR/X86/kill-after-spill.mir
  test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
  test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
  test/DebugInfo/MIR/X86/live-debug-values-spill.mir
  test/DebugInfo/MIR/X86/live-debug-values.mir
  test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir
  test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir
  test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
  test/DebugInfo/MIR/X86/mlicm-hoist.mir
  test/DebugInfo/MIR/X86/regcoalescer.mir
  test/DebugInfo/MSP430/sdagsplit-1.ll
  test/DebugInfo/WebAssembly/dbg-value-live-interval.ll
  test/DebugInfo/WebAssembly/dbg-value-move-2.ll
  test/DebugInfo/WebAssembly/dbg-value-move.ll
  test/DebugInfo/X86/bbjoin.ll
  test/DebugInfo/X86/live-debug-vars-discard-invalid.mir
  test/DebugInfo/X86/live-debug-vars-dse.mir
  test/DebugInfo/X86/live-debug-vars-index.mir
  test/DebugInfo/X86/pr34545.ll
  test/DebugInfo/X86/sdag-combine.ll
  test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
  test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
  test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
  test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
  test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
  test/DebugInfo/X86/sdag-legalize-multires.ll
  test/DebugInfo/X86/sdag-salvage-add.ll
  test/DebugInfo/X86/sdagsplit-1.ll

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