[PATCH] D53629: [GlobalISel] Restrict G_MERGE_VALUES capability and replace with new opcodes

[Amara Emerson via Phabricator via llvm-commits]

aemerson updated this revision to Diff 171524.
aemerson added a comment.

Updated AArch64 legalization. I've removed the unsupported case since we're actually making it valid.


Repository:
  rL LLVM

https://reviews.llvm.org/D53629

Files:
  include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
  include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
  lib/CodeGen/GlobalISel/IRTranslator.cpp
  lib/CodeGen/GlobalISel/Legalizer.cpp
  lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  lib/CodeGen/MachineVerifier.cpp
  lib/Target/AArch64/AArch64InstructionSelector.cpp
  lib/Target/AArch64/AArch64LegalizerInfo.cpp
  lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  lib/Target/X86/X86InstructionSelector.cpp
  lib/Target/X86/X86LegalizerInfo.cpp
  test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
  test/CodeGen/AArch64/GlobalISel/legalize-add.mir
  test/CodeGen/AArch64/GlobalISel/legalize-build-vector.mir
  test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
  test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir
  test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  test/CodeGen/AArch64/GlobalISel/select-build-vector.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values-build-vector.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
  test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
  test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
  test/CodeGen/X86/GlobalISel/legalize-add-v256.mir
  test/CodeGen/X86/GlobalISel/legalize-add-v512.mir
  test/CodeGen/X86/GlobalISel/select-merge-vec256.mir
  test/CodeGen/X86/GlobalISel/select-merge-vec512.mir

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