[PATCH] D53784: [DAGCombiner] narrow vector binops when extraction is cheap

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


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Comment at: test/CodeGen/X86/vector-reduce-xor.ll:236
 ; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
 ; AVX1-NEXT:    vxorps %ymm1, %ymm0, %ymm0
 ; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
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RKSimon wrote:
> There's still a lot of logic ops happening at full width - is this to do with the bitcasts?
Yes:
  t5: v8i32 = xor t2, t30
                t24: v4i64 = bitcast t5
              t34: v2i64 = extract_subvector t24, Constant:i64<0>

...so we should pick that up in the follow-up, or if we want to go big, I can add those diffs to this patch.


https://reviews.llvm.org/D53784