[PATCH] D53784: [DAGCombiner] narrow vector binops when extraction is cheap
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 27 09:59:13 PDT 2018
spatel updated this revision to Diff 171403.
spatel edited the summary of this revision.
spatel added a comment.
Patch updated:
No code changes; made the avx2-sched.ll test file independent of this patch.
https://reviews.llvm.org/D53784
Files:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
test/CodeGen/X86/2012-04-26-sdglue.ll
test/CodeGen/X86/avx-logic.ll
test/CodeGen/X86/avx-vzeroupper.ll
test/CodeGen/X86/avx512-hadd-hsub.ll
test/CodeGen/X86/avx512-insert-extract.ll
test/CodeGen/X86/avx512-skx-insert-subvec.ll
test/CodeGen/X86/known-signbits-vector.ll
test/CodeGen/X86/madd.ll
test/CodeGen/X86/min-legal-vector-width.ll
test/CodeGen/X86/sad.ll
test/CodeGen/X86/shrink_vmul.ll
test/CodeGen/X86/vec_int_to_fp.ll
test/CodeGen/X86/vector-compare-all_of.ll
test/CodeGen/X86/vector-compare-any_of.ll
test/CodeGen/X86/vector-reduce-add.ll
test/CodeGen/X86/vector-reduce-and.ll
test/CodeGen/X86/vector-reduce-fadd-fast.ll
test/CodeGen/X86/vector-reduce-fmul-fast.ll
test/CodeGen/X86/vector-reduce-mul.ll
test/CodeGen/X86/vector-reduce-or.ll
test/CodeGen/X86/vector-reduce-xor.ll
test/CodeGen/X86/vector-rotate-256.ll
test/CodeGen/X86/vector-rotate-512.ll
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