[llvm] r345453 - Regenerate FP_TO_INT tests.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 27 08:00:39 PDT 2018
Author: rksimon
Date: Sat Oct 27 08:00:38 2018
New Revision: 345453
URL: http://llvm.org/viewvc/llvm-project?rev=345453&view=rev
Log:
Regenerate FP_TO_INT tests.
Precursor to fix for PR17686
Modified:
llvm/trunk/test/CodeGen/Mips/2008-07-07-Float2Int.ll
llvm/trunk/test/CodeGen/Mips/msa/f16-llvm-ir.ll
llvm/trunk/test/CodeGen/SystemZ/fp-conv-10.ll
llvm/trunk/test/CodeGen/SystemZ/fp-conv-12.ll
Modified: llvm/trunk/test/CodeGen/Mips/2008-07-07-Float2Int.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-07-Float2Int.ll?rev=345453&r1=345452&r2=345453&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-07-Float2Int.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-07-Float2Int.ll Sat Oct 27 08:00:38 2018
@@ -1,17 +1,33 @@
-; RUN: llc -march=mips < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=mips-- | FileCheck %s
define i32 @fptoint(float %a) nounwind {
+; CHECK-LABEL: fptoint:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: trunc.w.s $f0, $f12
+; CHECK-NEXT: jr $ra
+; CHECK-NEXT: mfc1 $2, $f0
entry:
-; CHECK: trunc.w.s
fptosi float %a to i32 ; <i32>:0 [#uses=1]
ret i32 %0
}
define i32 @fptouint(float %a) nounwind {
+; CHECK-LABEL: fptouint:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lui $1, %hi($CPI1_0)
+; CHECK-NEXT: lwc1 $f0, %lo($CPI1_0)($1)
+; CHECK-NEXT: sub.s $f1, $f12, $f0
+; CHECK-NEXT: trunc.w.s $f1, $f1
+; CHECK-NEXT: mfc1 $1, $f1
+; CHECK-NEXT: lui $2, 32768
+; CHECK-NEXT: xor $2, $1, $2
+; CHECK-NEXT: trunc.w.s $f1, $f12
+; CHECK-NEXT: mfc1 $1, $f1
+; CHECK-NEXT: c.olt.s $f12, $f0
+; CHECK-NEXT: jr $ra
+; CHECK-NEXT: movt $2, $1, $fcc0
entry:
-; CHECK: fptouint
-; CHECK: trunc.w.s
-; CHECK: trunc.w.s
fptoui float %a to i32 ; <i32>:0 [#uses=1]
ret i32 %0
}
Modified: llvm/trunk/test/CodeGen/Mips/msa/f16-llvm-ir.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/msa/f16-llvm-ir.ll?rev=345453&r1=345452&r2=345453&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/msa/f16-llvm-ir.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/msa/f16-llvm-ir.ll Sat Oct 27 08:00:38 2018
@@ -1,20 +1,21 @@
-; RUN: llc -relocation-model=pic -march=mipsel -mcpu=mips32r5 \
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -relocation-model=pic -mtriple=mipsel-- -mcpu=mips32r5 \
; RUN: -mattr=+fp64,+msa -verify-machineinstrs < %s | FileCheck %s \
; RUN: --check-prefixes=ALL,MIPS32,MIPSR5,MIPS32-O32,MIPS32R5-O32
-; RUN: llc -relocation-model=pic -march=mips64el -mcpu=mips64r5 \
+; RUN: llc -relocation-model=pic -mtriple=mips64el-- -mcpu=mips64r5 \
; RUN: -mattr=+fp64,+msa -verify-machineinstrs -target-abi n32 < %s | FileCheck %s \
; RUN: --check-prefixes=ALL,MIPS64,MIPSR5,MIPS64-N32,MIPS64R5-N32
-; RUN: llc -relocation-model=pic -march=mips64el -mcpu=mips64r5 \
+; RUN: llc -relocation-model=pic -mtriple=mips64el-- -mcpu=mips64r5 \
; RUN: -mattr=+fp64,+msa -verify-machineinstrs -target-abi n64 < %s | FileCheck %s \
; RUN: --check-prefixes=ALL,MIPS64,MIPSR5,MIPS64-N64,MIPS64R5-N64
-; RUN: llc -relocation-model=pic -march=mipsel -mcpu=mips32r6 \
+; RUN: llc -relocation-model=pic -mtriple=mipsel-- -mcpu=mips32r6 \
; RUN: -mattr=+fp64,+msa -verify-machineinstrs < %s | FileCheck %s \
; RUN: --check-prefixes=ALL,MIPS32,MIPSR6,MIPSR6-O32
-; RUN: llc -relocation-model=pic -march=mips64el -mcpu=mips64r6 \
+; RUN: llc -relocation-model=pic -mtriple=mips64el-- -mcpu=mips64r6 \
; RUN: -mattr=+fp64,+msa -verify-machineinstrs -target-abi n32 < %s | FileCheck %s \
; RUN: --check-prefixes=ALL,MIPS64,MIPSR6,MIPS64-N32,MIPSR6-N32
-; RUN: llc -relocation-model=pic -march=mips64el -mcpu=mips64r6 \
+; RUN: llc -relocation-model=pic -mtriple=mips64el-- -mcpu=mips64r6 \
; RUN: -mattr=+fp64,+msa -verify-machineinstrs -target-abi n64 < %s | FileCheck %s \
; RUN: --check-prefixes=ALL,MIPS64,MIPSR6,MIPS64-N64,MIPSR6-N64
@@ -26,16 +27,73 @@
declare float @k2(half *)
define void @f3(i16 %b) {
+; MIPS32-LABEL: f3:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -32
+; MIPS32-NEXT: .cfi_def_cfa_offset 32
+; MIPS32-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 24($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $16, $2, $25
+; MIPS32-NEXT: sh $4, 22($sp)
+; MIPS32-NEXT: addiu $4, $sp, 22
+; MIPS32-NEXT: lw $25, %call16(k2)($16)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: move $gp, $16
+; MIPS32-NEXT: lw $1, %got(k)($16)
+; MIPS32-NEXT: swc1 $f0, 0($1)
+; MIPS32-NEXT: lw $16, 24($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 28($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N32-LABEL: f3:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(f3)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(f3)))
+; MIPS64-N32-NEXT: sh $4, 14($sp)
+; MIPS64-N32-NEXT: lw $25, %call16(k2)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: addiu $4, $sp, 14
+; MIPS64-N32-NEXT: lw $1, %got_disp(k)($gp)
+; MIPS64-N32-NEXT: swc1 $f0, 0($1)
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: f3:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(f3)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(f3)))
+; MIPS64-N64-NEXT: sh $4, 14($sp)
+; MIPS64-N64-NEXT: ld $25, %call16(k2)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: daddiu $4, $sp, 14
+; MIPS64-N64-NEXT: ld $1, %got_disp(k)($gp)
+; MIPS64-N64-NEXT: swc1 $f0, 0($1)
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: f3:
-
-; ALL: sh $4, [[O0:[0-9]+]]($sp)
-; ALL-DAG: jalr $25
-; MIPS32-DAG: addiu $4, $sp, [[O0]]
-; MIPS64-N32: addiu $4, $sp, [[O0]]
-; MIPS64-N64: daddiu $4, $sp, [[O0]]
-; ALL: swc1 $f0
-
%0 = alloca half
%1 = bitcast i16 %b to half
store half %1, half * %0
@@ -45,16 +103,59 @@ entry:
}
define void @f(i16 %b) {
-; ALL-LABEL: f:
-
-; ALL: sh $4, [[O0:[0-9]+]]($sp)
-; ALL: lh $[[R0:[0-9]+]], [[O0]]($sp)
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; ALL: swc1 $f[[F0]]
-
+; MIPS32-LABEL: f:
+; MIPS32: # %bb.0:
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: sh $4, 4($sp)
+; MIPS32-NEXT: lh $2, 4($sp)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f0
+; MIPS32-NEXT: lw $1, %got(k)($1)
+; MIPS32-NEXT: swc1 $f0, 0($1)
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 8
+;
+; MIPS64-N32-LABEL: f:
+; MIPS64-N32: # %bb.0:
+; MIPS64-N32-NEXT: addiu $sp, $sp, -16
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 16
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(f)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(f)))
+; MIPS64-N32-NEXT: sh $4, 12($sp)
+; MIPS64-N32-NEXT: lh $2, 12($sp)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $2, $f0
+; MIPS64-N32-NEXT: lw $1, %got_disp(k)($1)
+; MIPS64-N32-NEXT: swc1 $f0, 0($1)
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 16
+;
+; MIPS64-N64-LABEL: f:
+; MIPS64-N64: # %bb.0:
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -16
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 16
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(f)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(f)))
+; MIPS64-N64-NEXT: sh $4, 12($sp)
+; MIPS64-N64-NEXT: lh $2, 12($sp)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $2, $f0
+; MIPS64-N64-NEXT: ld $1, %got_disp(k)($1)
+; MIPS64-N64-NEXT: swc1 $f0, 0($1)
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 16
%1 = bitcast i16 %b to half
%2 = fpext half %1 to float
store float %2, float * @k
@@ -72,180 +173,488 @@ define void @f(i16 %b) {
; MIPSR5. Additionally, fp64 mode / FR=1 is required to use MSA.
define void @fadd_f64() {
+; MIPS32-LABEL: fadd_f64:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(h)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: fexupr.d $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f1
+; MIPS32-NEXT: copy_s.w $2, $w0[1]
+; MIPS32-NEXT: mthc1 $2, $f1
+; MIPS32-NEXT: add.d $f0, $f1, $f1
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w1, $2
+; MIPS32-NEXT: mfhc1 $2, $f0
+; MIPS32-NEXT: insert.w $w1[1], $2
+; MIPS32-NEXT: insert.w $w1[3], $2
+; MIPS32-NEXT: fexdo.w $w0, $w1, $w1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: fadd_f64:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fadd_f64)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fadd_f64)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(h)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: fexupr.d $w0, $w0
+; MIPS64-N32-NEXT: copy_s.d $2, $w0[0]
+; MIPS64-N32-NEXT: dmtc1 $2, $f0
+; MIPS64-N32-NEXT: add.d $f0, $f0, $f0
+; MIPS64-N32-NEXT: dmfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.d $w0, $2
+; MIPS64-N32-NEXT: fexdo.w $w0, $w0, $w0
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: fadd_f64:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fadd_f64)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fadd_f64)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(h)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: fexupr.d $w0, $w0
+; MIPS64-N64-NEXT: copy_s.d $2, $w0[0]
+; MIPS64-N64-NEXT: dmtc1 $2, $f0
+; MIPS64-N64-NEXT: add.d $f0, $f0, $f0
+; MIPS64-N64-NEXT: dmfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.d $w0, $2
+; MIPS64-N64-NEXT: fexdo.w $w0, $w0, $w0
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fadd_f64:
%0 = load half, half * @h, align 2
%1 = fpext half %0 to double
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: fexupr.d $w[[W2:[0-9]+]], $w[[W1]]
-; MIPS32: copy_s.w $[[R1:[0-9]+]], $w[[W2]][0]
-; MIPS32: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32: copy_s.w $[[R2:[0-9]+]], $w[[W2]][1]
-; MIPS32: mthc1 $[[R2]], $f[[F0]]
-; MIPS64: copy_s.d $[[R2:[0-9]+]], $w[[W2]][0]
-; MIPS64: dmtc1 $[[R2]], $f[[F0:[0-9]+]]
-
%2 = load half, half * @h, align 2
%3 = fpext half %2 to double
%add = fadd double %1, %3
-
-; ALL: add.d $f[[F1:[0-9]+]], $f[[F0]], $f[[F0]]
-
%4 = fptrunc double %add to half
-
-; MIPS32: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; MIPS32: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; MIPS32: mfhc1 $[[R3:[0-9]+]], $f[[F1]]
-; MIPS32: insert.w $w[[W2]][1], $[[R3]]
-; MIPS32: insert.w $w[[W2]][3], $[[R3]]
-
-; MIPS64: dmfc1 $[[R2:[0-9]+]], $f[[F1]]
-; MIPS64: fill.d $w[[W2:[0-9]+]], $[[R2]]
-
-; ALL: fexdo.w $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: fexdo.h $w[[W4:[0-9]+]], $w[[W3]], $w[[W3]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W4]][0]
-; ALL: sh $[[R3]]
store half %4, half * @h, align 2
ret void
}
define i32 @ffptoui() {
+; MIPS32-O32-LABEL: ffptoui:
+; MIPS32-O32: # %bb.0: # %entry
+; MIPS32-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-O32-NEXT: addu $1, $2, $25
+; MIPS32-O32-NEXT: lw $2, %got(h)($1)
+; MIPS32-O32-NEXT: lw $3, %got($CPI3_0)($1)
+; MIPS32-O32-NEXT: lwc1 $f0, %lo($CPI3_0)($3)
+; MIPS32-O32-NEXT: lh $2, 0($2)
+; MIPS32-O32-NEXT: fill.h $w1, $2
+; MIPS32-O32-NEXT: fexupr.w $w1, $w1
+; MIPS32-O32-NEXT: copy_s.w $2, $w1[0]
+; MIPS32-O32-NEXT: mtc1 $2, $f2
+; MIPS32-O32-NEXT: sub.s $f0, $f2, $f0
+; MIPS32-O32-NEXT: mfc1 $2, $f0
+; MIPS32-O32-NEXT: fill.w $w0, $2
+; MIPS32-O32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-O32-NEXT: fexupr.w $w0, $w0
+; MIPS32-O32-NEXT: fexupr.d $w0, $w0
+; MIPS32-O32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-O32-NEXT: mtc1 $2, $f3
+; MIPS32-O32-NEXT: copy_s.w $2, $w0[1]
+; MIPS32-O32-NEXT: mthc1 $2, $f3
+; MIPS32-O32-NEXT: trunc.w.d $f0, $f3
+; MIPS32-O32-NEXT: mfc1 $2, $f0
+; MIPS32-O32-NEXT: fexupr.d $w0, $w1
+; MIPS32-O32-NEXT: copy_s.w $3, $w0[0]
+; MIPS32-O32-NEXT: mtc1 $3, $f1
+; MIPS32-O32-NEXT: copy_s.w $3, $w0[1]
+; MIPS32-O32-NEXT: mthc1 $3, $f1
+; MIPS32-O32-NEXT: trunc.w.d $f0, $f1
+; MIPS32-O32-NEXT: mfc1 $3, $f0
+; MIPS32-O32-NEXT: lw $1, %got($CPI3_1)($1)
+; MIPS32-O32-NEXT: addiu $1, $1, %lo($CPI3_1)
+; MIPS32-O32-NEXT: lui $4, 32768
+; MIPS32-O32-NEXT: xor $2, $2, $4
+; MIPS32-O32-NEXT: lh $1, 0($1)
+; MIPS32-O32-NEXT: fill.h $w0, $1
+; MIPS32-O32-NEXT: fexupr.w $w0, $w0
+; MIPS32-O32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-O32-NEXT: mtc1 $1, $f0
+; MIPS32-O32-NEXT: c.olt.s $f2, $f0
+; MIPS32-O32-NEXT: jr $ra
+; MIPS32-O32-NEXT: movt $2, $3, $fcc0
+;
+; MIPS64R5-N32-LABEL: ffptoui:
+; MIPS64R5-N32: # %bb.0: # %entry
+; MIPS64R5-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ffptoui)))
+; MIPS64R5-N32-NEXT: addu $1, $1, $25
+; MIPS64R5-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(ffptoui)))
+; MIPS64R5-N32-NEXT: lw $2, %got_disp(h)($1)
+; MIPS64R5-N32-NEXT: lw $3, %got_page(.LCPI3_0)($1)
+; MIPS64R5-N32-NEXT: lwc1 $f0, %got_ofst(.LCPI3_0)($3)
+; MIPS64R5-N32-NEXT: lh $2, 0($2)
+; MIPS64R5-N32-NEXT: fill.h $w1, $2
+; MIPS64R5-N32-NEXT: fexupr.w $w1, $w1
+; MIPS64R5-N32-NEXT: copy_s.w $2, $w1[0]
+; MIPS64R5-N32-NEXT: mtc1 $2, $f2
+; MIPS64R5-N32-NEXT: sub.s $f0, $f2, $f0
+; MIPS64R5-N32-NEXT: mfc1 $2, $f0
+; MIPS64R5-N32-NEXT: fill.w $w0, $2
+; MIPS64R5-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64R5-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N32-NEXT: fexupr.d $w0, $w0
+; MIPS64R5-N32-NEXT: copy_s.d $2, $w0[0]
+; MIPS64R5-N32-NEXT: dmtc1 $2, $f0
+; MIPS64R5-N32-NEXT: trunc.w.d $f0, $f0
+; MIPS64R5-N32-NEXT: mfc1 $2, $f0
+; MIPS64R5-N32-NEXT: fexupr.d $w0, $w1
+; MIPS64R5-N32-NEXT: copy_s.d $3, $w0[0]
+; MIPS64R5-N32-NEXT: dmtc1 $3, $f0
+; MIPS64R5-N32-NEXT: trunc.w.d $f0, $f0
+; MIPS64R5-N32-NEXT: mfc1 $3, $f0
+; MIPS64R5-N32-NEXT: lw $1, %got_page(.LCPI3_1)($1)
+; MIPS64R5-N32-NEXT: addiu $1, $1, %got_ofst(.LCPI3_1)
+; MIPS64R5-N32-NEXT: lui $4, 32768
+; MIPS64R5-N32-NEXT: xor $2, $2, $4
+; MIPS64R5-N32-NEXT: lh $1, 0($1)
+; MIPS64R5-N32-NEXT: fill.h $w0, $1
+; MIPS64R5-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64R5-N32-NEXT: mtc1 $1, $f0
+; MIPS64R5-N32-NEXT: c.olt.s $f2, $f0
+; MIPS64R5-N32-NEXT: jr $ra
+; MIPS64R5-N32-NEXT: movt $2, $3, $fcc0
+;
+; MIPS64R5-N64-LABEL: ffptoui:
+; MIPS64R5-N64: # %bb.0: # %entry
+; MIPS64R5-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ffptoui)))
+; MIPS64R5-N64-NEXT: daddu $1, $1, $25
+; MIPS64R5-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(ffptoui)))
+; MIPS64R5-N64-NEXT: ld $2, %got_disp(h)($1)
+; MIPS64R5-N64-NEXT: ld $3, %got_page(.LCPI3_0)($1)
+; MIPS64R5-N64-NEXT: lwc1 $f0, %got_ofst(.LCPI3_0)($3)
+; MIPS64R5-N64-NEXT: lh $2, 0($2)
+; MIPS64R5-N64-NEXT: fill.h $w1, $2
+; MIPS64R5-N64-NEXT: fexupr.w $w1, $w1
+; MIPS64R5-N64-NEXT: copy_s.w $2, $w1[0]
+; MIPS64R5-N64-NEXT: mtc1 $2, $f2
+; MIPS64R5-N64-NEXT: sub.s $f0, $f2, $f0
+; MIPS64R5-N64-NEXT: mfc1 $2, $f0
+; MIPS64R5-N64-NEXT: fill.w $w0, $2
+; MIPS64R5-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64R5-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N64-NEXT: fexupr.d $w0, $w0
+; MIPS64R5-N64-NEXT: copy_s.d $2, $w0[0]
+; MIPS64R5-N64-NEXT: dmtc1 $2, $f0
+; MIPS64R5-N64-NEXT: trunc.w.d $f0, $f0
+; MIPS64R5-N64-NEXT: mfc1 $2, $f0
+; MIPS64R5-N64-NEXT: fexupr.d $w0, $w1
+; MIPS64R5-N64-NEXT: copy_s.d $3, $w0[0]
+; MIPS64R5-N64-NEXT: dmtc1 $3, $f0
+; MIPS64R5-N64-NEXT: trunc.w.d $f0, $f0
+; MIPS64R5-N64-NEXT: mfc1 $3, $f0
+; MIPS64R5-N64-NEXT: ld $1, %got_page(.LCPI3_1)($1)
+; MIPS64R5-N64-NEXT: daddiu $1, $1, %got_ofst(.LCPI3_1)
+; MIPS64R5-N64-NEXT: lui $4, 32768
+; MIPS64R5-N64-NEXT: xor $2, $2, $4
+; MIPS64R5-N64-NEXT: lh $1, 0($1)
+; MIPS64R5-N64-NEXT: fill.h $w0, $1
+; MIPS64R5-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64R5-N64-NEXT: mtc1 $1, $f0
+; MIPS64R5-N64-NEXT: c.olt.s $f2, $f0
+; MIPS64R5-N64-NEXT: jr $ra
+; MIPS64R5-N64-NEXT: movt $2, $3, $fcc0
+;
+; MIPSR6-O32-LABEL: ffptoui:
+; MIPSR6-O32: # %bb.0: # %entry
+; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPSR6-O32-NEXT: addu $1, $2, $25
+; MIPSR6-O32-NEXT: lw $2, %got(h)($1)
+; MIPSR6-O32-NEXT: lw $1, %got($CPI3_0)($1)
+; MIPSR6-O32-NEXT: lwc1 $f0, %lo($CPI3_0)($1)
+; MIPSR6-O32-NEXT: lh $1, 0($2)
+; MIPSR6-O32-NEXT: fill.h $w1, $1
+; MIPSR6-O32-NEXT: fexupr.w $w1, $w1
+; MIPSR6-O32-NEXT: copy_s.w $1, $w1[0]
+; MIPSR6-O32-NEXT: mtc1 $1, $f2
+; MIPSR6-O32-NEXT: cmp.lt.s $f3, $f2, $f0
+; MIPSR6-O32-NEXT: sub.s $f0, $f2, $f0
+; MIPSR6-O32-NEXT: mfc1 $1, $f0
+; MIPSR6-O32-NEXT: fill.w $w0, $1
+; MIPSR6-O32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-O32-NEXT: fexupr.d $w0, $w0
+; MIPSR6-O32-NEXT: copy_s.w $1, $w0[0]
+; MIPSR6-O32-NEXT: mtc1 $1, $f2
+; MIPSR6-O32-NEXT: copy_s.w $1, $w0[1]
+; MIPSR6-O32-NEXT: mthc1 $1, $f2
+; MIPSR6-O32-NEXT: trunc.w.d $f0, $f2
+; MIPSR6-O32-NEXT: mfc1 $1, $f0
+; MIPSR6-O32-NEXT: fexupr.d $w0, $w1
+; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-O32-NEXT: mtc1 $2, $f1
+; MIPSR6-O32-NEXT: copy_s.w $2, $w0[1]
+; MIPSR6-O32-NEXT: mthc1 $2, $f1
+; MIPSR6-O32-NEXT: trunc.w.d $f0, $f1
+; MIPSR6-O32-NEXT: mfc1 $2, $f0
+; MIPSR6-O32-NEXT: lui $3, 32768
+; MIPSR6-O32-NEXT: xor $1, $1, $3
+; MIPSR6-O32-NEXT: mfc1 $3, $f3
+; MIPSR6-O32-NEXT: seleqz $1, $1, $3
+; MIPSR6-O32-NEXT: selnez $2, $2, $3
+; MIPSR6-O32-NEXT: jr $ra
+; MIPSR6-O32-NEXT: or $2, $2, $1
+;
+; MIPSR6-N32-LABEL: ffptoui:
+; MIPSR6-N32: # %bb.0: # %entry
+; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ffptoui)))
+; MIPSR6-N32-NEXT: addu $1, $1, $25
+; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(ffptoui)))
+; MIPSR6-N32-NEXT: lw $2, %got_disp(h)($1)
+; MIPSR6-N32-NEXT: lw $1, %got_page(.LCPI3_0)($1)
+; MIPSR6-N32-NEXT: lwc1 $f0, %got_ofst(.LCPI3_0)($1)
+; MIPSR6-N32-NEXT: lh $1, 0($2)
+; MIPSR6-N32-NEXT: fill.h $w1, $1
+; MIPSR6-N32-NEXT: fexupr.w $w1, $w1
+; MIPSR6-N32-NEXT: copy_s.w $1, $w1[0]
+; MIPSR6-N32-NEXT: mtc1 $1, $f2
+; MIPSR6-N32-NEXT: cmp.lt.s $f3, $f2, $f0
+; MIPSR6-N32-NEXT: sub.s $f0, $f2, $f0
+; MIPSR6-N32-NEXT: mfc1 $1, $f0
+; MIPSR6-N32-NEXT: fill.w $w0, $1
+; MIPSR6-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N32-NEXT: fexupr.d $w0, $w0
+; MIPSR6-N32-NEXT: copy_s.d $1, $w0[0]
+; MIPSR6-N32-NEXT: dmtc1 $1, $f0
+; MIPSR6-N32-NEXT: trunc.w.d $f0, $f0
+; MIPSR6-N32-NEXT: mfc1 $1, $f0
+; MIPSR6-N32-NEXT: fexupr.d $w0, $w1
+; MIPSR6-N32-NEXT: copy_s.d $2, $w0[0]
+; MIPSR6-N32-NEXT: dmtc1 $2, $f0
+; MIPSR6-N32-NEXT: trunc.w.d $f0, $f0
+; MIPSR6-N32-NEXT: mfc1 $2, $f0
+; MIPSR6-N32-NEXT: lui $3, 32768
+; MIPSR6-N32-NEXT: xor $1, $1, $3
+; MIPSR6-N32-NEXT: mfc1 $3, $f3
+; MIPSR6-N32-NEXT: seleqz $1, $1, $3
+; MIPSR6-N32-NEXT: selnez $2, $2, $3
+; MIPSR6-N32-NEXT: jr $ra
+; MIPSR6-N32-NEXT: or $2, $2, $1
+;
+; MIPSR6-N64-LABEL: ffptoui:
+; MIPSR6-N64: # %bb.0: # %entry
+; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ffptoui)))
+; MIPSR6-N64-NEXT: daddu $1, $1, $25
+; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(ffptoui)))
+; MIPSR6-N64-NEXT: ld $2, %got_disp(h)($1)
+; MIPSR6-N64-NEXT: ld $1, %got_page(.LCPI3_0)($1)
+; MIPSR6-N64-NEXT: lwc1 $f0, %got_ofst(.LCPI3_0)($1)
+; MIPSR6-N64-NEXT: lh $1, 0($2)
+; MIPSR6-N64-NEXT: fill.h $w1, $1
+; MIPSR6-N64-NEXT: fexupr.w $w1, $w1
+; MIPSR6-N64-NEXT: copy_s.w $1, $w1[0]
+; MIPSR6-N64-NEXT: mtc1 $1, $f2
+; MIPSR6-N64-NEXT: cmp.lt.s $f3, $f2, $f0
+; MIPSR6-N64-NEXT: sub.s $f0, $f2, $f0
+; MIPSR6-N64-NEXT: mfc1 $1, $f0
+; MIPSR6-N64-NEXT: fill.w $w0, $1
+; MIPSR6-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N64-NEXT: fexupr.d $w0, $w0
+; MIPSR6-N64-NEXT: copy_s.d $1, $w0[0]
+; MIPSR6-N64-NEXT: dmtc1 $1, $f0
+; MIPSR6-N64-NEXT: trunc.w.d $f0, $f0
+; MIPSR6-N64-NEXT: mfc1 $1, $f0
+; MIPSR6-N64-NEXT: fexupr.d $w0, $w1
+; MIPSR6-N64-NEXT: copy_s.d $2, $w0[0]
+; MIPSR6-N64-NEXT: dmtc1 $2, $f0
+; MIPSR6-N64-NEXT: trunc.w.d $f0, $f0
+; MIPSR6-N64-NEXT: mfc1 $2, $f0
+; MIPSR6-N64-NEXT: lui $3, 32768
+; MIPSR6-N64-NEXT: xor $1, $1, $3
+; MIPSR6-N64-NEXT: mfc1 $3, $f3
+; MIPSR6-N64-NEXT: seleqz $1, $1, $3
+; MIPSR6-N64-NEXT: selnez $2, $2, $3
+; MIPSR6-N64-NEXT: jr $ra
+; MIPSR6-N64-NEXT: or $2, $2, $1
entry:
-; ALL-LABEL: ffptoui:
%0 = load half, half * @h, align 2
%1 = fptoui half %0 to i32
-; MIPS32: lwc1 $f[[FC:[0-9]+]], %lo($CPI{{[0-9]+}}_{{[0-9]+}})
-; MIPS64-N32: lwc1 $f[[FC:[0-9]+]], %got_ofst(.LCPI{{[0-9]+}}_{{[0-9]+}})
-; MIPS64-N64: lwc1 $f[[FC:[0-9]+]], %got_ofst(.LCPI{{[0-9]+}}_{{[0-9]+}})
-
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPSR6: cmp.lt.s $f[[F1:[0-9]+]], $f[[F0]], $f[[FC]]
-; ALL: sub.s $f[[F2:[0-9]+]], $f[[F0]], $f[[FC]]
-; ALL: mfc1 $[[R2:[0-9]]], $f[[F2]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: fexupr.w $w[[W4:[0-9]+]], $w[[W3]]
-; ALL: fexupr.d $w[[W5:[0-9]+]], $w[[W4]]
-
-; MIPS32: copy_s.w $[[R3:[0-9]+]], $w[[W5]][0]
-; MIPS32: mtc1 $[[R3]], $f[[F3:[0-9]+]]
-; MIPS32: copy_s.w $[[R4:[0-9]+]], $w[[W5]][1]
-; MIPS32: mthc1 $[[R3]], $f[[F3]]
-
-; MIPS64: copy_s.d $[[R2:[0-9]+]], $w[[W2]][0]
-; MIPS64: dmtc1 $[[R2]], $f[[F3:[0-9]+]]
-
-; ALL: trunc.w.d $f[[F4:[0-9]+]], $f[[F3]]
-; ALL: mfc1 $[[R4:[0-9]+]], $f[[F4]]
-; ALL: fexupr.d $w[[W6:[0-9]+]], $w[[W1]]
-
-; MIPS32: copy_s.w $[[R5:[0-9]+]], $w[[W6]][0]
-; MIPS32: mtc1 $[[R5]], $f[[F5:[0-9]+]]
-; MIPS32: copy_s.w $[[R6:[0-9]+]], $w[[W6]][1]
-; MIPS32: mthc1 $[[R6]], $f[[F5]]
-
-; MIPS64: copy_s.d $[[R2:[0-9]+]], $w[[W2]][0]
-; MIPS64: dmtc1 $[[R2]], $f[[F5:[0-9]+]]
-
-; ALL: trunc.w.d $f[[F6:[0-9]]], $f[[F5]]
-; ALL: mfc1 $[[R7:[0-9]]], $f[[F6]]
-
-; MIPS32R5-O32: lw $[[R13:[0-9]+]], %got($CPI{{[0-9]+}}_{{[0-9]+}})
-; MIPS32R5-O32: addiu $[[R14:[0-9]+]], $[[R13]], %lo($CPI{{[0-9]+}}_{{[0-9]+}})
-
-; MIPS64R5-N32: lw $[[R13:[0-9]+]], %got_page(.LCPI{{[0-9]+}}_{{[0-9]+}})
-; MIPS64R5-N32: addiu $[[R14:[0-9]+]], $[[R13]], %got_ofst(.LCPI{{[0-9]+}}_{{[0-9]+}})
-
-; MIPS64R5-N64: ld $[[R13:[0-9]+]], %got_page(.LCPI{{[0-9]+}}_{{[0-9]+}})
-; MIPS64R5-N64: daddiu $[[R14:[0-9]+]], $[[R13]], %got_ofst(.LCPI{{[0-9]+}}_{{[0-9]+}})
-
-; ALL: lui $[[R8:[0-9]+]], 32768
-; ALL: xor $[[R9:[0-9]+]], $[[R4]], $[[R8]]
-
-; MIPSR5: lh $[[R15:[0-9]+]], 0($[[R14]])
-; MIPSR5: fill.h $w[[W7:[0-9]+]], $[[R15]]
-; MIPSR5: fexupr.w $w[[W8:[0-9]+]], $w[[W7]]
-; MIPSR5: copy_s.w $[[R16:[0-9]+]], $w[[W8]][0]
-; MIPSR5: mtc1 $[[R16]], $f[[F7:[0-9]+]]
-; MIPSR5: c.olt.s $f[[F0]], $f[[F7]]
-; MIPSR5: movt $[[R9]], $[[R7]], $fcc0
-
-; MIPSR6: mfc1 $[[R10:[0-9]+]], $f[[F1]]
-; MIPSR6: seleqz $[[R11:[0-9]]], $[[R9]], $[[R10]]
-; MIPSR6: selnez $[[R12:[0-9]]], $[[R7]], $[[R10]]
-; MIPSR6: or $2, $[[R12]], $[[R11]]
+
+
+
+
+
+
+
ret i32 %1
}
define i32 @ffptosi() {
+; MIPS32-LABEL: ffptosi:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(h)($1)
+; MIPS32-NEXT: lh $1, 0($1)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: fexupr.d $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: mtc1 $1, $f1
+; MIPS32-NEXT: copy_s.w $1, $w0[1]
+; MIPS32-NEXT: mthc1 $1, $f1
+; MIPS32-NEXT: trunc.w.d $f0, $f1
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: mfc1 $2, $f0
+;
+; MIPS64-N32-LABEL: ffptosi:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ffptosi)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(ffptosi)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(h)($1)
+; MIPS64-N32-NEXT: lh $1, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: fexupr.d $w0, $w0
+; MIPS64-N32-NEXT: copy_s.d $1, $w0[0]
+; MIPS64-N32-NEXT: dmtc1 $1, $f0
+; MIPS64-N32-NEXT: trunc.w.d $f0, $f0
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: mfc1 $2, $f0
+;
+; MIPS64-N64-LABEL: ffptosi:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ffptosi)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(ffptosi)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(h)($1)
+; MIPS64-N64-NEXT: lh $1, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: fexupr.d $w0, $w0
+; MIPS64-N64-NEXT: copy_s.d $1, $w0[0]
+; MIPS64-N64-NEXT: dmtc1 $1, $f0
+; MIPS64-N64-NEXT: trunc.w.d $f0, $f0
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: mfc1 $2, $f0
entry:
-; ALL-LABEL: ffptosi:
%0 = load half, half * @h, align 2
%1 = fptosi half %0 to i32
ret i32 %1
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: fexupr.d $w[[W2:[0-9]+]], $w[[W1]]
-
-; MIPS32: copy_s.w $[[R2:[0-9]+]], $w[[W2]][0]
-; MIPS32: mtc1 $[[R2]], $f[[F0:[0-9]+]]
-; MIPS32: copy_s.w $[[R3:[0-9]+]], $w[[W2]][1]
-; MIPS32: mthc1 $[[R3]], $f[[F0]]
-; MIPS64: copy_s.d $[[R2:[0-9]+]], $w[[W2]][0]
-; MIPS64: dmtc1 $[[R2]], $f[[F0:[0-9]+]]
-; ALL: trunc.w.d $f[[F1:[0-9]+]], $f[[F0]]
-; ALL: mfc1 $2, $f[[F1]]
+
}
define void @uitofp(i32 %a) {
+; MIPS32-LABEL: uitofp:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lui $2, 17200
+; MIPS32-NEXT: sw $2, 4($sp)
+; MIPS32-NEXT: sw $4, 0($sp)
+; MIPS32-NEXT: lw $2, %got($CPI5_0)($1)
+; MIPS32-NEXT: ldc1 $f0, %lo($CPI5_0)($2)
+; MIPS32-NEXT: ldc1 $f1, 0($sp)
+; MIPS32-NEXT: sub.d $f0, $f1, $f0
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w1, $2
+; MIPS32-NEXT: mfhc1 $2, $f0
+; MIPS32-NEXT: insert.w $w1[1], $2
+; MIPS32-NEXT: insert.w $w1[3], $2
+; MIPS32-NEXT: fexdo.w $w0, $w1, $w1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: lw $1, %got(h)($1)
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: sh $2, 0($1)
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 8
+;
+; MIPS64-N32-LABEL: uitofp:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -16
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 16
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(uitofp)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(uitofp)))
+; MIPS64-N32-NEXT: lui $2, 17200
+; MIPS64-N32-NEXT: sw $2, 12($sp)
+; MIPS64-N32-NEXT: sll $2, $4, 0
+; MIPS64-N32-NEXT: sw $2, 8($sp)
+; MIPS64-N32-NEXT: lw $2, %got_page(.LCPI5_0)($1)
+; MIPS64-N32-NEXT: ldc1 $f0, %got_ofst(.LCPI5_0)($2)
+; MIPS64-N32-NEXT: ldc1 $f1, 8($sp)
+; MIPS64-N32-NEXT: sub.d $f0, $f1, $f0
+; MIPS64-N32-NEXT: dmfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.d $w0, $2
+; MIPS64-N32-NEXT: fexdo.w $w0, $w0, $w0
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: lw $1, %got_disp(h)($1)
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: sh $2, 0($1)
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 16
+;
+; MIPS64-N64-LABEL: uitofp:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -16
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 16
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(uitofp)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(uitofp)))
+; MIPS64-N64-NEXT: lui $2, 17200
+; MIPS64-N64-NEXT: sw $2, 12($sp)
+; MIPS64-N64-NEXT: sll $2, $4, 0
+; MIPS64-N64-NEXT: sw $2, 8($sp)
+; MIPS64-N64-NEXT: ld $2, %got_page(.LCPI5_0)($1)
+; MIPS64-N64-NEXT: ldc1 $f0, %got_ofst(.LCPI5_0)($2)
+; MIPS64-N64-NEXT: ldc1 $f1, 8($sp)
+; MIPS64-N64-NEXT: sub.d $f0, $f1, $f0
+; MIPS64-N64-NEXT: dmfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.d $w0, $2
+; MIPS64-N64-NEXT: fexdo.w $w0, $w0, $w0
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: ld $1, %got_disp(h)($1)
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: sh $2, 0($1)
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 16
entry:
-; ALL-LABEL: uitofp:
-; MIPS32-O32: ldc1 $f[[F0:[0-9]+]], %lo($CPI{{[0-9]+}}_{{[0-9]+}})
-; MIPS32-O32: ldc1 $f[[F1:[0-9]+]], 0($sp)
-; MIPS64-N32: ldc1 $f[[F0:[0-9]+]], %got_ofst(.LCPI{{[0-9]+}}_{{[0-9]+}})
-; MIPS64-N32: ldc1 $f[[F1:[0-9]+]], 8($sp)
-; MIPS64-N64: ldc1 $f[[F0:[0-9]+]], %got_ofst(.LCPI{{[0-9]+}}_{{[0-9]+}})
-; MIPS64-N64: ldc1 $f[[F1:[0-9]+]], 8($sp)
-; MIPSR5: sub.d $f[[F2:[0-9]+]], $f[[F1]], $f[[F0]]
-; MIPSR6-O32: sub.d $f[[F2:[0-9]+]], $f[[F0]], $f[[F1]]
-; MIPSR6-N32: sub.d $f[[F2:[0-9]+]], $f[[F1]], $f[[F0]]
-; MIPSR6-N64: sub.d $f[[F2:[0-9]+]], $f[[F1]], $f[[F0]]
-; MIPS32: mfc1 $[[R0:[0-9]+]], $f[[F2]]
-; MIPS32: fill.w $w[[W0:[0-9]+]], $[[R0]]
-; MIPS32: mfhc1 $[[R1:[0-9]+]], $f[[F2]]
-; MIPS32: insert.w $w[[W0]][1], $[[R1]]
-; MIPS32: insert.w $w[[W0]][3], $[[R1]]
-; MIPS64-N64-DAG: ld $[[R3:[0-9]+]], %got_disp(h)
-; MIPS64-N32-DAG: lw $[[R3:[0-9]+]], %got_disp(h)
-; MIPS64-DAG: dmfc1 $[[R1:[0-9]+]], $f[[F2]]
-; MIPS64-DAG: fill.d $w[[W0:[0-9]+]], $[[R1]]
-; ALL-DAG: fexdo.w $w[[W1:[0-9]+]], $w[[W0]], $w[[W0]]
-; ALL-DAG: fexdo.h $w[[W2:[0-9]+]], $w[[W1]], $w[[W1]]
-; MIPS32-DAG: lw $[[R3:[0-9]+]], %got(h)
-; ALL: copy_u.h $[[R2:[0-9]+]], $w[[W2]]
-; ALL: sh $[[R2]], 0($[[R3]])
%0 = uitofp i32 %a to half
store half %0, half * @h, align 2
ret void
@@ -256,30 +665,74 @@ entry:
; We don't check f16 -> f64 expansion occurs, as we expand f16 to f32.
define void @fadd() {
+; MIPS32-LABEL: fadd:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(g)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f0
+; MIPS32-NEXT: add.s $f0, $f0, $f0
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w0, $2
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: fadd:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fadd)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fadd)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $2, $f0
+; MIPS64-N32-NEXT: add.s $f0, $f0, $f0
+; MIPS64-N32-NEXT: mfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $2
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: fadd:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fadd)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fadd)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $2, $f0
+; MIPS64-N64-NEXT: add.s $f0, $f0, $f0
+; MIPS64-N64-NEXT: mfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $2
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fadd:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
%2 = load i16, i16* @g, align 2
%3 = call float @llvm.convert.from.fp16.f32(i16 %2)
%add = fadd float %1, %3
-; ALL: add.s $f[[F1:[0-9]+]], $f[[F0]], $f[[F0]]
%4 = call i16 @llvm.convert.to.fp16.f32(float %add)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
-; ALL: sh $[[R3]]
store i16 %4, i16* @g, align 2
ret void
}
@@ -292,126 +745,338 @@ declare i16 @llvm.convert.to.fp16.f32(fl
; Function Attrs: nounwind
define void @fsub() {
+; MIPS32-LABEL: fsub:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(g)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f0
+; MIPS32-NEXT: sub.s $f0, $f0, $f0
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w0, $2
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: fsub:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fsub)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fsub)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $2, $f0
+; MIPS64-N32-NEXT: sub.s $f0, $f0, $f0
+; MIPS64-N32-NEXT: mfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $2
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: fsub:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fsub)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fsub)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $2, $f0
+; MIPS64-N64-NEXT: sub.s $f0, $f0, $f0
+; MIPS64-N64-NEXT: mfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $2
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fsub:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
%2 = load i16, i16* @g, align 2
%3 = call float @llvm.convert.from.fp16.f32(i16 %2)
%sub = fsub float %1, %3
-; ALL: sub.s $f[[F1:[0-9]+]], $f[[F0]], $f[[F0]]
%4 = call i16 @llvm.convert.to.fp16.f32(float %sub)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %4, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
define void @fmult() {
+; MIPS32-LABEL: fmult:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(g)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f0
+; MIPS32-NEXT: mul.s $f0, $f0, $f0
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w0, $2
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: fmult:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fmult)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fmult)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $2, $f0
+; MIPS64-N32-NEXT: mul.s $f0, $f0, $f0
+; MIPS64-N32-NEXT: mfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $2
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: fmult:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fmult)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fmult)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $2, $f0
+; MIPS64-N64-NEXT: mul.s $f0, $f0, $f0
+; MIPS64-N64-NEXT: mfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $2
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fmult:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
%2 = load i16, i16* @g, align 2
%3 = call float @llvm.convert.from.fp16.f32(i16 %2)
%mul = fmul float %1, %3
-; ALL: mul.s $f[[F1:[0-9]+]], $f[[F0]], $f[[F0]]
%4 = call i16 @llvm.convert.to.fp16.f32(float %mul)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %4, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
define void @fdiv() {
+; MIPS32-LABEL: fdiv:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(g)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f0
+; MIPS32-NEXT: div.s $f0, $f0, $f0
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w0, $2
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: fdiv:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fdiv)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fdiv)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $2, $f0
+; MIPS64-N32-NEXT: div.s $f0, $f0, $f0
+; MIPS64-N32-NEXT: mfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $2
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: fdiv:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fdiv)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fdiv)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $2, $f0
+; MIPS64-N64-NEXT: div.s $f0, $f0, $f0
+; MIPS64-N64-NEXT: mfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $2
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fdiv:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
%2 = load i16, i16* @g, align 2
%3 = call float @llvm.convert.from.fp16.f32(i16 %2)
%div = fdiv float %1, %3
-; ALL: div.s $f[[F1:[0-9]+]], $f[[F0]], $f[[F0]]
%4 = call i16 @llvm.convert.to.fp16.f32(float %div)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %4, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
define void @frem() {
+; MIPS32-LABEL: frem:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: lw $25, %call16(fmodf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mov.s $f14, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: frem:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(frem)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(frem)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: lw $25, %call16(fmodf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mov.s $f13, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: frem:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(frem)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(frem)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: ld $25, %call16(fmodf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mov.s $f13, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: frem:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
%2 = load i16, i16* @g, align 2
%3 = call float @llvm.convert.from.fp16.f32(i16 %2)
%rem = frem float %1, %3
-; MIPS32: lw $25, %call16(fmodf)($gp)
-; MIPS64-N32: lw $25, %call16(fmodf)($gp)
-; MIPS64-N64: ld $25, %call16(fmodf)($gp)
-; ALL: jalr $25
%4 = call i16 @llvm.convert.to.fp16.f32(float %rem)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %4, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -419,31 +1084,127 @@ entry:
@i1 = external global i16, align 1
define void @fcmp() {
+; MIPS32-O32-LABEL: fcmp:
+; MIPS32-O32: # %bb.0: # %entry
+; MIPS32-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-O32-NEXT: addu $1, $2, $25
+; MIPS32-O32-NEXT: lw $2, %got(g)($1)
+; MIPS32-O32-NEXT: lh $2, 0($2)
+; MIPS32-O32-NEXT: fill.h $w0, $2
+; MIPS32-O32-NEXT: fexupr.w $w0, $w0
+; MIPS32-O32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-O32-NEXT: mtc1 $2, $f0
+; MIPS32-O32-NEXT: addiu $2, $zero, 1
+; MIPS32-O32-NEXT: c.un.s $f0, $f0
+; MIPS32-O32-NEXT: movt $2, $zero, $fcc0
+; MIPS32-O32-NEXT: lw $1, %got(i1)($1)
+; MIPS32-O32-NEXT: jr $ra
+; MIPS32-O32-NEXT: sh $2, 0($1)
+;
+; MIPS64R5-N32-LABEL: fcmp:
+; MIPS64R5-N32: # %bb.0: # %entry
+; MIPS64R5-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fcmp)))
+; MIPS64R5-N32-NEXT: addu $1, $1, $25
+; MIPS64R5-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fcmp)))
+; MIPS64R5-N32-NEXT: lw $2, %got_disp(g)($1)
+; MIPS64R5-N32-NEXT: lh $2, 0($2)
+; MIPS64R5-N32-NEXT: fill.h $w0, $2
+; MIPS64R5-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64R5-N32-NEXT: mtc1 $2, $f0
+; MIPS64R5-N32-NEXT: addiu $2, $zero, 1
+; MIPS64R5-N32-NEXT: c.un.s $f0, $f0
+; MIPS64R5-N32-NEXT: movt $2, $zero, $fcc0
+; MIPS64R5-N32-NEXT: lw $1, %got_disp(i1)($1)
+; MIPS64R5-N32-NEXT: jr $ra
+; MIPS64R5-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64R5-N64-LABEL: fcmp:
+; MIPS64R5-N64: # %bb.0: # %entry
+; MIPS64R5-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fcmp)))
+; MIPS64R5-N64-NEXT: daddu $1, $1, $25
+; MIPS64R5-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fcmp)))
+; MIPS64R5-N64-NEXT: ld $2, %got_disp(g)($1)
+; MIPS64R5-N64-NEXT: lh $2, 0($2)
+; MIPS64R5-N64-NEXT: fill.h $w0, $2
+; MIPS64R5-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64R5-N64-NEXT: mtc1 $2, $f0
+; MIPS64R5-N64-NEXT: addiu $2, $zero, 1
+; MIPS64R5-N64-NEXT: c.un.s $f0, $f0
+; MIPS64R5-N64-NEXT: movt $2, $zero, $fcc0
+; MIPS64R5-N64-NEXT: ld $1, %got_disp(i1)($1)
+; MIPS64R5-N64-NEXT: jr $ra
+; MIPS64R5-N64-NEXT: sh $2, 0($1)
+;
+; MIPSR6-O32-LABEL: fcmp:
+; MIPSR6-O32: # %bb.0: # %entry
+; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPSR6-O32-NEXT: addu $1, $2, $25
+; MIPSR6-O32-NEXT: lw $2, %got(g)($1)
+; MIPSR6-O32-NEXT: lh $2, 0($2)
+; MIPSR6-O32-NEXT: fill.h $w0, $2
+; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-O32-NEXT: mtc1 $2, $f0
+; MIPSR6-O32-NEXT: cmp.un.s $f0, $f0, $f0
+; MIPSR6-O32-NEXT: mfc1 $2, $f0
+; MIPSR6-O32-NEXT: not $2, $2
+; MIPSR6-O32-NEXT: andi $2, $2, 1
+; MIPSR6-O32-NEXT: lw $1, %got(i1)($1)
+; MIPSR6-O32-NEXT: jr $ra
+; MIPSR6-O32-NEXT: sh $2, 0($1)
+;
+; MIPSR6-N32-LABEL: fcmp:
+; MIPSR6-N32: # %bb.0: # %entry
+; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fcmp)))
+; MIPSR6-N32-NEXT: addu $1, $1, $25
+; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fcmp)))
+; MIPSR6-N32-NEXT: lw $2, %got_disp(g)($1)
+; MIPSR6-N32-NEXT: lh $2, 0($2)
+; MIPSR6-N32-NEXT: fill.h $w0, $2
+; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-N32-NEXT: mtc1 $2, $f0
+; MIPSR6-N32-NEXT: cmp.un.s $f0, $f0, $f0
+; MIPSR6-N32-NEXT: mfc1 $2, $f0
+; MIPSR6-N32-NEXT: not $2, $2
+; MIPSR6-N32-NEXT: andi $2, $2, 1
+; MIPSR6-N32-NEXT: lw $1, %got_disp(i1)($1)
+; MIPSR6-N32-NEXT: jr $ra
+; MIPSR6-N32-NEXT: sh $2, 0($1)
+;
+; MIPSR6-N64-LABEL: fcmp:
+; MIPSR6-N64: # %bb.0: # %entry
+; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fcmp)))
+; MIPSR6-N64-NEXT: daddu $1, $1, $25
+; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fcmp)))
+; MIPSR6-N64-NEXT: ld $2, %got_disp(g)($1)
+; MIPSR6-N64-NEXT: lh $2, 0($2)
+; MIPSR6-N64-NEXT: fill.h $w0, $2
+; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-N64-NEXT: mtc1 $2, $f0
+; MIPSR6-N64-NEXT: cmp.un.s $f0, $f0, $f0
+; MIPSR6-N64-NEXT: mfc1 $2, $f0
+; MIPSR6-N64-NEXT: not $2, $2
+; MIPSR6-N64-NEXT: andi $2, $2, 1
+; MIPSR6-N64-NEXT: ld $1, %got_disp(i1)($1)
+; MIPSR6-N64-NEXT: jr $ra
+; MIPSR6-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fcmp:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
%2 = load i16, i16* @g, align 2
%3 = call float @llvm.convert.from.fp16.f32(i16 %2)
%fcmp = fcmp oeq float %1, %3
-; MIPSR5: addiu $[[R2:[0-9]+]], $zero, 1
-; MIPSR5: c.un.s $f[[F0]], $f[[F0]]
-; MIPSR5: movt $[[R2]], $zero, $fcc0
-; MIPSR6: cmp.un.s $f[[F1:[0-9]+]], $f[[F0]], $f[[F0]]
-; MIPSR6: mfc1 $[[R3:[0-9]]], $f[[F1]]
-; MIPSR6: not $[[R4:[0-9]+]], $[[R3]]
-; MIPSR6: andi $[[R2:[0-9]+]], $[[R4]], 1
%4 = zext i1 %fcmp to i16
store i16 %4, i16* @i1, align 2
-; ALL: sh $[[R2]]
ret void
}
@@ -451,125 +1212,406 @@ entry:
declare float @llvm.powi.f32(float, i32)
define void @fpowi() {
+; MIPS32-LABEL: fpowi:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(g)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f0
+; MIPS32-NEXT: mul.s $f0, $f0, $f0
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w0, $2
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: fpowi:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fpowi)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fpowi)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $2, $f0
+; MIPS64-N32-NEXT: mul.s $f0, $f0, $f0
+; MIPS64-N32-NEXT: mfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $2
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: fpowi:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fpowi)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fpowi)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $2, $f0
+; MIPS64-N64-NEXT: mul.s $f0, $f0, $f0
+; MIPS64-N64-NEXT: mfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $2
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fpowi:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
%powi = call float @llvm.powi.f32(float %1, i32 2)
-; ALL: mul.s $f[[F1:[0-9]+]], $f[[F0]], $f[[F0]]
%2 = call i16 @llvm.convert.to.fp16.f32(float %powi)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
define void @fpowi_var(i32 %var) {
+; MIPS32-LABEL: fpowi_var:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: lw $25, %call16(__powisf2)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: move $5, $4
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fpowi_var:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fpowi_var)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fpowi_var)))
+; MIPS64-N32-NEXT: sll $5, $4, 0
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(__powisf2)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fpowi_var:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fpowi_var)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fpowi_var)))
+; MIPS64-N64-NEXT: sll $5, $4, 0
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(__powisf2)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fpowi_var:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
%powi = call float @llvm.powi.f32(float %1, i32 %var)
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(__powisf2)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(__powisf2)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(__powisf2)($gp)
-; ALL-DAG: jalr $25
%2 = call i16 @llvm.convert.to.fp16.f32(float %powi)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
declare float @llvm.pow.f32(float %Val, float %power)
define void @fpow(float %var) {
+; MIPS32-LABEL: fpow:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: mov.s $f14, $f12
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(powf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fpow:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fpow)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fpow)))
+; MIPS64-N32-NEXT: mov.s $f13, $f12
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(powf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fpow:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fpow)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fpow)))
+; MIPS64-N64-NEXT: mov.s $f13, $f12
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(powf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fpow:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
%powi = call float @llvm.pow.f32(float %1, float %var)
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(powf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(powf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(powf)($gp)
-; ALL-DAG: jalr $25
%2 = call i16 @llvm.convert.to.fp16.f32(float %powi)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
declare float @llvm.log2.f32(float %Val)
define void @flog2() {
+; MIPS32-LABEL: flog2:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(log2f)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: flog2:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(flog2)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(flog2)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(log2f)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: flog2:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(flog2)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(flog2)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(log2f)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: flog2:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(log2f)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(log2f)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(log2f)($gp)
-; ALL-DAG: jalr $25
%log2 = call float @llvm.log2.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %log2)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -577,31 +1619,108 @@ entry:
declare float @llvm.log10.f32(float %Val)
define void @flog10() {
+; MIPS32-LABEL: flog10:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(log10f)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: flog10:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(flog10)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(flog10)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(log10f)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: flog10:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(flog10)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(flog10)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(log10f)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: flog10:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(log10f)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(log10f)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(log10f)($gp)
-; ALL-DAG: jalr $25
%log10 = call float @llvm.log10.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %log10)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -609,28 +1728,72 @@ entry:
declare float @llvm.sqrt.f32(float %Val)
define void @fsqrt() {
+; MIPS32-LABEL: fsqrt:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(g)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f0
+; MIPS32-NEXT: sqrt.s $f0, $f0
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w0, $2
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: fsqrt:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fsqrt)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fsqrt)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $2, $f0
+; MIPS64-N32-NEXT: sqrt.s $f0, $f0
+; MIPS64-N32-NEXT: mfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $2
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: fsqrt:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fsqrt)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fsqrt)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $2, $f0
+; MIPS64-N64-NEXT: sqrt.s $f0, $f0
+; MIPS64-N64-NEXT: mfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $2
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fsqrt:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; ALL: sqrt.s $f[[F1:[0-9]+]], $f[[F0]]
%sqrt = call float @llvm.sqrt.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %sqrt)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -638,31 +1801,108 @@ entry:
declare float @llvm.sin.f32(float %Val)
define void @fsin() {
+; MIPS32-LABEL: fsin:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(sinf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fsin:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fsin)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fsin)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(sinf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fsin:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fsin)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fsin)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(sinf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fsin:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(sinf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(sinf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(sinf)($gp)
-; ALL-DAG: jalr $25
%sin = call float @llvm.sin.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %sin)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -670,31 +1910,108 @@ entry:
declare float @llvm.cos.f32(float %Val)
define void @fcos() {
+; MIPS32-LABEL: fcos:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(cosf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fcos:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fcos)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fcos)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(cosf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fcos:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fcos)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fcos)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(cosf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fcos:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(cosf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(cosf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(cosf)($gp)
-; ALL-DAG: jalr $25
%cos = call float @llvm.cos.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %cos)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -702,30 +2019,107 @@ entry:
declare float @llvm.exp.f32(float %Val)
define void @fexp() {
+; MIPS32-LABEL: fexp:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(expf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fexp:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fexp)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fexp)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(expf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fexp:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fexp)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fexp)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(expf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fexp:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(expf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(expf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(expf)($gp)
-; ALL-DAG: jalr $25
%exp = call float @llvm.exp.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %exp)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -733,31 +2127,108 @@ entry:
declare float @llvm.exp2.f32(float %Val)
define void @fexp2() {
+; MIPS32-LABEL: fexp2:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(exp2f)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fexp2:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fexp2)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fexp2)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(exp2f)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fexp2:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fexp2)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fexp2)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(exp2f)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fexp2:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(exp2f)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(exp2f)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(exp2f)($gp)
-; ALL-DAG: jalr $25
%exp2 = call float @llvm.exp2.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %exp2)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -765,31 +2236,115 @@ entry:
declare float @llvm.fma.f32(float, float, float)
define void @ffma(float %b, float %c) {
+; MIPS32-LABEL: ffma:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: mov.s $f0, $f12
+; MIPS32-NEXT: mfc1 $6, $f14
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w1, $1
+; MIPS32-NEXT: fexupr.w $w1, $w1
+; MIPS32-NEXT: copy_s.w $1, $w1[0]
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: lw $25, %call16(fmaf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mov.s $f14, $f0
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: ffma:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ffma)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(ffma)))
+; MIPS64-N32-NEXT: mov.s $f14, $f13
+; MIPS64-N32-NEXT: mov.s $f13, $f12
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(fmaf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: ffma:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ffma)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(ffma)))
+; MIPS64-N64-NEXT: mov.s $f14, $f13
+; MIPS64-N64-NEXT: mov.s $f13, $f12
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(fmaf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: ffma:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(fmaf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(fmaf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(fmaf)($gp)
-; ALL-DAG: jalr $25
%fma = call float @llvm.fma.f32(float %1, float %b, float %c)
%2 = call i16 @llvm.convert.to.fp16.f32(float %fma)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -800,34 +2355,134 @@ entry:
declare float @llvm.fmuladd.f32(float, float, float)
define void @ffmuladd(float %b, float %c) {
+; MIPS32-O32-LABEL: ffmuladd:
+; MIPS32-O32: # %bb.0: # %entry
+; MIPS32-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-O32-NEXT: addu $1, $2, $25
+; MIPS32-O32-NEXT: lw $1, %got(g)($1)
+; MIPS32-O32-NEXT: lh $2, 0($1)
+; MIPS32-O32-NEXT: fill.h $w0, $2
+; MIPS32-O32-NEXT: fexupr.w $w0, $w0
+; MIPS32-O32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-O32-NEXT: mtc1 $2, $f0
+; MIPS32-O32-NEXT: madd.s $f0, $f14, $f0, $f12
+; MIPS32-O32-NEXT: mfc1 $2, $f0
+; MIPS32-O32-NEXT: fill.w $w0, $2
+; MIPS32-O32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-O32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-O32-NEXT: jr $ra
+; MIPS32-O32-NEXT: sh $2, 0($1)
+;
+; MIPS64R5-N32-LABEL: ffmuladd:
+; MIPS64R5-N32: # %bb.0: # %entry
+; MIPS64R5-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ffmuladd)))
+; MIPS64R5-N32-NEXT: addu $1, $1, $25
+; MIPS64R5-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(ffmuladd)))
+; MIPS64R5-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64R5-N32-NEXT: lh $2, 0($1)
+; MIPS64R5-N32-NEXT: fill.h $w0, $2
+; MIPS64R5-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64R5-N32-NEXT: mtc1 $2, $f0
+; MIPS64R5-N32-NEXT: madd.s $f0, $f13, $f0, $f12
+; MIPS64R5-N32-NEXT: mfc1 $2, $f0
+; MIPS64R5-N32-NEXT: fill.w $w0, $2
+; MIPS64R5-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64R5-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64R5-N32-NEXT: jr $ra
+; MIPS64R5-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64R5-N64-LABEL: ffmuladd:
+; MIPS64R5-N64: # %bb.0: # %entry
+; MIPS64R5-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ffmuladd)))
+; MIPS64R5-N64-NEXT: daddu $1, $1, $25
+; MIPS64R5-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(ffmuladd)))
+; MIPS64R5-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64R5-N64-NEXT: lh $2, 0($1)
+; MIPS64R5-N64-NEXT: fill.h $w0, $2
+; MIPS64R5-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64R5-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64R5-N64-NEXT: mtc1 $2, $f0
+; MIPS64R5-N64-NEXT: madd.s $f0, $f13, $f0, $f12
+; MIPS64R5-N64-NEXT: mfc1 $2, $f0
+; MIPS64R5-N64-NEXT: fill.w $w0, $2
+; MIPS64R5-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64R5-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64R5-N64-NEXT: jr $ra
+; MIPS64R5-N64-NEXT: sh $2, 0($1)
+;
+; MIPSR6-O32-LABEL: ffmuladd:
+; MIPSR6-O32: # %bb.0: # %entry
+; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
+; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPSR6-O32-NEXT: addu $1, $2, $25
+; MIPSR6-O32-NEXT: lw $1, %got(g)($1)
+; MIPSR6-O32-NEXT: lh $2, 0($1)
+; MIPSR6-O32-NEXT: fill.h $w0, $2
+; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-O32-NEXT: mtc1 $2, $f0
+; MIPSR6-O32-NEXT: mul.s $f0, $f0, $f12
+; MIPSR6-O32-NEXT: add.s $f0, $f0, $f14
+; MIPSR6-O32-NEXT: mfc1 $2, $f0
+; MIPSR6-O32-NEXT: fill.w $w0, $2
+; MIPSR6-O32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-O32-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-O32-NEXT: jr $ra
+; MIPSR6-O32-NEXT: sh $2, 0($1)
+;
+; MIPSR6-N32-LABEL: ffmuladd:
+; MIPSR6-N32: # %bb.0: # %entry
+; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ffmuladd)))
+; MIPSR6-N32-NEXT: addu $1, $1, $25
+; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(ffmuladd)))
+; MIPSR6-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPSR6-N32-NEXT: lh $2, 0($1)
+; MIPSR6-N32-NEXT: fill.h $w0, $2
+; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-N32-NEXT: mtc1 $2, $f0
+; MIPSR6-N32-NEXT: mul.s $f0, $f0, $f12
+; MIPSR6-N32-NEXT: add.s $f0, $f0, $f13
+; MIPSR6-N32-NEXT: mfc1 $2, $f0
+; MIPSR6-N32-NEXT: fill.w $w0, $2
+; MIPSR6-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-N32-NEXT: jr $ra
+; MIPSR6-N32-NEXT: sh $2, 0($1)
+;
+; MIPSR6-N64-LABEL: ffmuladd:
+; MIPSR6-N64: # %bb.0: # %entry
+; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ffmuladd)))
+; MIPSR6-N64-NEXT: daddu $1, $1, $25
+; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(ffmuladd)))
+; MIPSR6-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPSR6-N64-NEXT: lh $2, 0($1)
+; MIPSR6-N64-NEXT: fill.h $w0, $2
+; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
+; MIPSR6-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPSR6-N64-NEXT: mtc1 $2, $f0
+; MIPSR6-N64-NEXT: mul.s $f0, $f0, $f12
+; MIPSR6-N64-NEXT: add.s $f0, $f0, $f13
+; MIPSR6-N64-NEXT: mfc1 $2, $f0
+; MIPSR6-N64-NEXT: fill.w $w0, $2
+; MIPSR6-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPSR6-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPSR6-N64-NEXT: jr $ra
+; MIPSR6-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: ffmuladd:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-O32: madd.s $f[[F1:[0-9]]], $f14, $f[[F0]], $f12
; MIPS32-N32: madd.s $f[[F1:[0-9]]], $f13, $f[[F0]], $f12
; MIPS32-N64: madd.s $f[[F1:[0-9]]], $f13, $f[[F0]], $f12
-; MIPSR6: mul.s $f[[F2:[0-9]+]], $f[[F0]], $f12
-; MIPSR6-O32: add.s $f[[F1:[0-9]+]], $f[[F2]], $f14
-; MIPSR6-N32: add.s $f[[F1:[0-9]+]], $f[[F2]], $f13
-; MIPSR6-N64: add.s $f[[F1:[0-9]+]], $f[[F2]], $f13
%fmuladd = call float @llvm.fmuladd.f32(float %1, float %b, float %c)
%2 = call i16 @llvm.convert.to.fp16.f32(float %fmuladd)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -835,60 +2490,184 @@ entry:
declare float @llvm.fabs.f32(float %Val)
define void @ffabs() {
+; MIPS32-LABEL: ffabs:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(g)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mtc1 $2, $f0
+; MIPS32-NEXT: abs.s $f0, $f0
+; MIPS32-NEXT: mfc1 $2, $f0
+; MIPS32-NEXT: fill.w $w0, $2
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: ffabs:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ffabs)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(ffabs)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mtc1 $2, $f0
+; MIPS64-N32-NEXT: abs.s $f0, $f0
+; MIPS64-N32-NEXT: mfc1 $2, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $2
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: ffabs:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ffabs)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(ffabs)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mtc1 $2, $f0
+; MIPS64-N64-NEXT: abs.s $f0, $f0
+; MIPS64-N64-NEXT: mfc1 $2, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $2
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: ffabs:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; ALL: abs.s $f[[F1:[0-9]+]], $f[[F0]]
%fabs = call float @llvm.fabs.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %fabs)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
declare float @llvm.minnum.f32(float %Val, float %b)
define void @fminnum(float %b) {
+; MIPS32-LABEL: fminnum:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: mov.s $f14, $f12
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(fminf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fminnum:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fminnum)))
+; MIPS64-N32-NEXT: mov.s $f13, $f12
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(fminf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fminnum:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fminnum)))
+; MIPS64-N64-NEXT: mov.s $f13, $f12
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(fminf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fminnum:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(fminf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(fminf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(fminf)($gp)
-; ALL-DAG: jalr $25
%minnum = call float @llvm.minnum.f32(float %1, float %b)
%2 = call i16 @llvm.convert.to.fp16.f32(float %minnum)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -896,31 +2675,111 @@ entry:
declare float @llvm.maxnum.f32(float %Val, float %b)
define void @fmaxnum(float %b) {
+; MIPS32-LABEL: fmaxnum:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: mov.s $f14, $f12
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(fmaxf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fmaxnum:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fmaxnum)))
+; MIPS64-N32-NEXT: mov.s $f13, $f12
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(fmaxf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fmaxnum:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fmaxnum)))
+; MIPS64-N64-NEXT: mov.s $f13, $f12
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(fmaxf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fmaxnum:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(fmaxf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(fmaxf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(fmaxf)($gp)
-; ALL-DAG: jalr $25
%maxnum = call float @llvm.maxnum.f32(float %1, float %b)
%2 = call i16 @llvm.convert.to.fp16.f32(float %maxnum)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -930,28 +2789,72 @@ entry:
declare float @llvm.copysign.f32(float %Val, float %b)
define void @fcopysign(float %b) {
+; MIPS32-LABEL: fcopysign:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addu $1, $2, $25
+; MIPS32-NEXT: lw $1, %got(g)($1)
+; MIPS32-NEXT: lh $2, 0($1)
+; MIPS32-NEXT: fill.h $w0, $2
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $2, $w0[0]
+; MIPS32-NEXT: mfc1 $3, $f12
+; MIPS32-NEXT: ext $3, $3, 31, 1
+; MIPS32-NEXT: ins $2, $3, 31, 1
+; MIPS32-NEXT: fill.w $w0, $2
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $2, $w0[0]
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N32-LABEL: fcopysign:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fcopysign)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fcopysign)))
+; MIPS64-N32-NEXT: lw $1, %got_disp(g)($1)
+; MIPS64-N32-NEXT: lh $2, 0($1)
+; MIPS64-N32-NEXT: fill.h $w0, $2
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N32-NEXT: mfc1 $3, $f12
+; MIPS64-N32-NEXT: ext $3, $3, 31, 1
+; MIPS64-N32-NEXT: ins $2, $3, 31, 1
+; MIPS64-N32-NEXT: fill.w $w0, $2
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: sh $2, 0($1)
+;
+; MIPS64-N64-LABEL: fcopysign:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fcopysign)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fcopysign)))
+; MIPS64-N64-NEXT: ld $1, %got_disp(g)($1)
+; MIPS64-N64-NEXT: lh $2, 0($1)
+; MIPS64-N64-NEXT: fill.h $w0, $2
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $2, $w0[0]
+; MIPS64-N64-NEXT: mfc1 $3, $f12
+; MIPS64-N64-NEXT: ext $3, $3, 31, 1
+; MIPS64-N64-NEXT: ins $2, $3, 31, 1
+; MIPS64-N64-NEXT: fill.w $w0, $2
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $2, $w0[0]
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: sh $2, 0($1)
entry:
-; ALL-LABEL: fcopysign:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
%copysign = call float @llvm.copysign.f32(float %1, float %b)
%2 = call i16 @llvm.convert.to.fp16.f32(float %copysign)
-; ALL: mfc1 $[[R2:[0-9]+]], $f12
-; ALL: ext $[[R3:[0-9]+]], $3, 31, 1
-; ALL: ins $[[R1]], $[[R3]], 31, 1
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R1]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -959,31 +2862,108 @@ entry:
declare float @llvm.floor.f32(float %Val)
define void @ffloor() {
+; MIPS32-LABEL: ffloor:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(floorf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: ffloor:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ffloor)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(ffloor)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(floorf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: ffloor:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ffloor)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(ffloor)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(floorf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: ffloor:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(floorf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(floorf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(floorf)($gp)
-; ALL-DAG: jalr $25
%floor = call float @llvm.floor.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %floor)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -991,31 +2971,108 @@ entry:
declare float @llvm.ceil.f32(float %Val)
define void @fceil() {
+; MIPS32-LABEL: fceil:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(ceilf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fceil:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fceil)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fceil)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(ceilf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fceil:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fceil)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fceil)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(ceilf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fceil:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(ceilf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(ceilf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(ceilf)($gp)
-; ALL-DAG: jalr $25
%ceil = call float @llvm.ceil.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %ceil)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -1023,31 +3080,108 @@ entry:
declare float @llvm.trunc.f32(float %Val)
define void @ftrunc() {
+; MIPS32-LABEL: ftrunc:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(truncf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: ftrunc:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(ftrunc)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(ftrunc)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(truncf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: ftrunc:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(ftrunc)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(ftrunc)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(truncf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: ftrunc:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(truncf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(truncf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(truncf)($gp)
-; ALL-DAG: jalr $25
%trunc = call float @llvm.trunc.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %trunc)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -1055,61 +3189,215 @@ entry:
declare float @llvm.rint.f32(float %Val)
define void @frint() {
+; MIPS32-LABEL: frint:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(rintf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: frint:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(frint)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(frint)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(rintf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: frint:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(frint)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(frint)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(rintf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: frint:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(rintf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(rintf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(rintf)($gp)
-; ALL-DAG: jalr $25
%rint = call float @llvm.rint.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %rint)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
declare float @llvm.nearbyint.f32(float %Val)
define void @fnearbyint() {
+; MIPS32-LABEL: fnearbyint:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(nearbyintf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fnearbyint:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fnearbyint)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fnearbyint)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(nearbyintf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fnearbyint:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fnearbyint)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fnearbyint)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(nearbyintf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fnearbyint:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(nearbyintf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(nearbyintf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(nearbyintf)($gp)
-; ALL-DAG: jalr $25
%nearbyint = call float @llvm.nearbyint.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %nearbyint)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
@@ -1117,31 +3405,108 @@ entry:
declare float @llvm.round.f32(float %Val)
define void @fround() {
+; MIPS32-LABEL: fround:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: sw $16, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: .cfi_offset 16, -8
+; MIPS32-NEXT: addu $gp, $2, $25
+; MIPS32-NEXT: lw $16, %got(g)($gp)
+; MIPS32-NEXT: lh $1, 0($16)
+; MIPS32-NEXT: fill.h $w0, $1
+; MIPS32-NEXT: fexupr.w $w0, $w0
+; MIPS32-NEXT: copy_s.w $1, $w0[0]
+; MIPS32-NEXT: lw $25, %call16(roundf)($gp)
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: mtc1 $1, $f12
+; MIPS32-NEXT: mfc1 $1, $f0
+; MIPS32-NEXT: fill.w $w0, $1
+; MIPS32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS32-NEXT: copy_u.h $1, $w0[0]
+; MIPS32-NEXT: sh $1, 0($16)
+; MIPS32-NEXT: lw $16, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: addiu $sp, $sp, 24
+;
+; MIPS64-N32-LABEL: fround:
+; MIPS64-N32: # %bb.0: # %entry
+; MIPS64-N32-NEXT: addiu $sp, $sp, -32
+; MIPS64-N32-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N32-NEXT: .cfi_offset 31, -8
+; MIPS64-N32-NEXT: .cfi_offset 28, -16
+; MIPS64-N32-NEXT: .cfi_offset 16, -24
+; MIPS64-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fround)))
+; MIPS64-N32-NEXT: addu $1, $1, $25
+; MIPS64-N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(fround)))
+; MIPS64-N32-NEXT: lw $16, %got_disp(g)($gp)
+; MIPS64-N32-NEXT: lh $1, 0($16)
+; MIPS64-N32-NEXT: fill.h $w0, $1
+; MIPS64-N32-NEXT: fexupr.w $w0, $w0
+; MIPS64-N32-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N32-NEXT: lw $25, %call16(roundf)($gp)
+; MIPS64-N32-NEXT: jalr $25
+; MIPS64-N32-NEXT: mtc1 $1, $f12
+; MIPS64-N32-NEXT: mfc1 $1, $f0
+; MIPS64-N32-NEXT: fill.w $w0, $1
+; MIPS64-N32-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N32-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N32-NEXT: sh $1, 0($16)
+; MIPS64-N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N32-NEXT: jr $ra
+; MIPS64-N32-NEXT: addiu $sp, $sp, 32
+;
+; MIPS64-N64-LABEL: fround:
+; MIPS64-N64: # %bb.0: # %entry
+; MIPS64-N64-NEXT: daddiu $sp, $sp, -32
+; MIPS64-N64-NEXT: .cfi_def_cfa_offset 32
+; MIPS64-N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
+; MIPS64-N64-NEXT: .cfi_offset 31, -8
+; MIPS64-N64-NEXT: .cfi_offset 28, -16
+; MIPS64-N64-NEXT: .cfi_offset 16, -24
+; MIPS64-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fround)))
+; MIPS64-N64-NEXT: daddu $1, $1, $25
+; MIPS64-N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(fround)))
+; MIPS64-N64-NEXT: ld $16, %got_disp(g)($gp)
+; MIPS64-N64-NEXT: lh $1, 0($16)
+; MIPS64-N64-NEXT: fill.h $w0, $1
+; MIPS64-N64-NEXT: fexupr.w $w0, $w0
+; MIPS64-N64-NEXT: copy_s.w $1, $w0[0]
+; MIPS64-N64-NEXT: ld $25, %call16(roundf)($gp)
+; MIPS64-N64-NEXT: jalr $25
+; MIPS64-N64-NEXT: mtc1 $1, $f12
+; MIPS64-N64-NEXT: mfc1 $1, $f0
+; MIPS64-N64-NEXT: fill.w $w0, $1
+; MIPS64-N64-NEXT: fexdo.h $w0, $w0, $w0
+; MIPS64-N64-NEXT: copy_u.h $1, $w0[0]
+; MIPS64-N64-NEXT: sh $1, 0($16)
+; MIPS64-N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
+; MIPS64-N64-NEXT: jr $ra
+; MIPS64-N64-NEXT: daddiu $sp, $sp, 32
entry:
-; ALL-LABEL: fround:
%0 = load i16, i16* @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
-; ALL: lh $[[R0:[0-9]+]]
-; ALL: fill.h $w[[W0:[0-9]+]], $[[R0]]
-; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
-; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
-; ALL-DAG: mtc1 $[[R1]], $f[[F0:[0-9]+]]
-; MIPS32-DAG: lw $25, %call16(roundf)($gp)
-; MIPS64-N32-DAG: lw $25, %call16(roundf)($gp)
-; MIPS64-N64-DAG: ld $25, %call16(roundf)($gp)
-; ALL-DAG: jalr $25
%round = call float @llvm.round.f32(float %1)
%2 = call i16 @llvm.convert.to.fp16.f32(float %round)
-; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
-; ALL: fill.w $w[[W2:[0-9]+]], $[[R2]]
-; ALL: fexdo.h $w[[W3:[0-9]+]], $w[[W2]], $w[[W2]]
-; ALL: copy_u.h $[[R3:[0-9]+]], $w[[W3]][0]
store i16 %2, i16* @g, align 2
-; ALL: sh $[[R3]]
ret void
}
Modified: llvm/trunk/test/CodeGen/SystemZ/fp-conv-10.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/fp-conv-10.ll?rev=345453&r1=345452&r2=345453&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-conv-10.ll (original)
+++ llvm/trunk/test/CodeGen/SystemZ/fp-conv-10.ll Sat Oct 27 08:00:38 2018
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Test conversion of floating-point values to unsigned i32s (z10 only).
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
@@ -10,11 +11,19 @@
; Test f32->i32.
define i32 @f1(float %f) {
; CHECK-LABEL: f1:
-; CHECK: cebr
-; CHECK: sebr
-; CHECK: cfebr
-; CHECK: xilf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: larl %r1, .LCPI0_0
+; CHECK-NEXT: le %f1, 0(%r1)
+; CHECK-NEXT: cebr %f0, %f1
+; CHECK-NEXT: jnl .LBB0_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cfebr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB0_2:
+; CHECK-NEXT: sebr %f0, %f1
+; CHECK-NEXT: cfebr %r2, 5, %f0
+; CHECK-NEXT: xilf %r2, 2147483648
+; CHECK-NEXT: br %r14
%conv = fptoui float %f to i32
ret i32 %conv
}
@@ -22,11 +31,19 @@ define i32 @f1(float %f) {
; Test f64->i32.
define i32 @f2(double %f) {
; CHECK-LABEL: f2:
-; CHECK: cdbr
-; CHECK: sdbr
-; CHECK: cfdbr
-; CHECK: xilf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: larl %r1, .LCPI1_0
+; CHECK-NEXT: ldeb %f1, 0(%r1)
+; CHECK-NEXT: cdbr %f0, %f1
+; CHECK-NEXT: jnl .LBB1_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cfdbr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB1_2:
+; CHECK-NEXT: sdbr %f0, %f1
+; CHECK-NEXT: cfdbr %r2, 5, %f0
+; CHECK-NEXT: xilf %r2, 2147483648
+; CHECK-NEXT: br %r14
%conv = fptoui double %f to i32
ret i32 %conv
}
@@ -34,11 +51,21 @@ define i32 @f2(double %f) {
; Test f128->i32.
define i32 @f3(fp128 *%src) {
; CHECK-LABEL: f3:
-; CHECK: cxbr
-; CHECK: sxbr
-; CHECK: cfxbr
-; CHECK: xilf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: ld %f0, 0(%r2)
+; CHECK-NEXT: ld %f2, 8(%r2)
+; CHECK-NEXT: larl %r1, .LCPI2_0
+; CHECK-NEXT: lxeb %f1, 0(%r1)
+; CHECK-NEXT: cxbr %f0, %f1
+; CHECK-NEXT: jnl .LBB2_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cfxbr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB2_2:
+; CHECK-NEXT: sxbr %f0, %f1
+; CHECK-NEXT: cfxbr %r2, 5, %f0
+; CHECK-NEXT: xilf %r2, 2147483648
+; CHECK-NEXT: br %r14
%f = load fp128, fp128 *%src
%conv = fptoui fp128 %f to i32
ret i32 %conv
Modified: llvm/trunk/test/CodeGen/SystemZ/fp-conv-12.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/fp-conv-12.ll?rev=345453&r1=345452&r2=345453&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-conv-12.ll (original)
+++ llvm/trunk/test/CodeGen/SystemZ/fp-conv-12.ll Sat Oct 27 08:00:38 2018
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Test conversion of floating-point values to unsigned i64s (z10 only).
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
@@ -9,11 +10,19 @@
; Test f32->i64.
define i64 @f1(float %f) {
; CHECK-LABEL: f1:
-; CHECK: cebr
-; CHECK: sebr
-; CHECK: cgebr
-; CHECK: xihf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: larl %r1, .LCPI0_0
+; CHECK-NEXT: le %f1, 0(%r1)
+; CHECK-NEXT: cebr %f0, %f1
+; CHECK-NEXT: jnl .LBB0_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cgebr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB0_2:
+; CHECK-NEXT: sebr %f0, %f1
+; CHECK-NEXT: cgebr %r2, 5, %f0
+; CHECK-NEXT: xihf %r2, 2147483648
+; CHECK-NEXT: br %r14
%conv = fptoui float %f to i64
ret i64 %conv
}
@@ -21,11 +30,19 @@ define i64 @f1(float %f) {
; Test f64->i64.
define i64 @f2(double %f) {
; CHECK-LABEL: f2:
-; CHECK: cdbr
-; CHECK: sdbr
-; CHECK: cgdbr
-; CHECK: xihf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: larl %r1, .LCPI1_0
+; CHECK-NEXT: ldeb %f1, 0(%r1)
+; CHECK-NEXT: cdbr %f0, %f1
+; CHECK-NEXT: jnl .LBB1_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cgdbr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB1_2:
+; CHECK-NEXT: sdbr %f0, %f1
+; CHECK-NEXT: cgdbr %r2, 5, %f0
+; CHECK-NEXT: xihf %r2, 2147483648
+; CHECK-NEXT: br %r14
%conv = fptoui double %f to i64
ret i64 %conv
}
@@ -33,11 +50,21 @@ define i64 @f2(double %f) {
; Test f128->i64.
define i64 @f3(fp128 *%src) {
; CHECK-LABEL: f3:
-; CHECK: cxbr
-; CHECK: sxbr
-; CHECK: cgxbr
-; CHECK: xihf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: ld %f0, 0(%r2)
+; CHECK-NEXT: ld %f2, 8(%r2)
+; CHECK-NEXT: larl %r1, .LCPI2_0
+; CHECK-NEXT: lxeb %f1, 0(%r1)
+; CHECK-NEXT: cxbr %f0, %f1
+; CHECK-NEXT: jnl .LBB2_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cgxbr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB2_2:
+; CHECK-NEXT: sxbr %f0, %f1
+; CHECK-NEXT: cgxbr %r2, 5, %f0
+; CHECK-NEXT: xihf %r2, 2147483648
+; CHECK-NEXT: br %r14
%f = load fp128, fp128 *%src
%conv = fptoui fp128 %f to i64
ret i64 %conv
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