[PATCH] D49671: [SchedModel] Propagate read advance cycles to implicit operands outside instruction descriptor

[Tom Stellard via Phabricator via llvm-commits]

tstellar added a comment.

AMDGPU tests look good, just the one comment for indirect-addressing-si.ll.



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Comment at: test/CodeGen/AMDGPU/indirect-addressing-si.ll:390
+; GCN-DAG: v_mov_b32_e32 v[[VEC_ELT2:[0-9]+]], s{{[0-9]+}}
+; GCN-DAG: v_mov_b32_e32 v[[VEC_ELT1:[3]+]], s{{[0-9]+}}
+; GCN-DAG: v_mov_b32_e32 v[[VEC_ELT0:[0-9]+]], s[[S_ELT0]]
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This [3] looks like a typo.


https://reviews.llvm.org/D49671