[PATCH] D53268: [X86] Stop promoting and/or/xor/andn to vXi64.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 25 12:04:43 PDT 2018


craig.topper added inline comments.


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Comment at: test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll:435
+; AVX-NEXT:    vmovsd {{.*#+}} xmm3 = mem[0],zero
+; AVX-NEXT:    vmovddup {{.*#+}} xmm3 = xmm3[0,0]
 ; AVX-NEXT:    vpaddb %xmm3, %xmm2, %xmm2
----------------
Here we have a 128-bit and a 256-bit broadcast going into isel. They both use the same load. But we don't have a broadcast f64->v4f64 instruction in AVX1 so isel emits a VMOVDDUP and an insert.  This CSEs with the VMOVDDUP emitted for the f64->v2f64 broadcast. But it was too late  to satisfy the one use check for the load folding. We probably need to split f64->v4f64 broadcasts during lowering/DAG combine instead of isel so it will CSE earlier.


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Comment at: test/CodeGen/X86/sat-add.ll:756
+; SSE2-NEXT:    pxor %xmm2, %xmm4
+; SSE2-NEXT:    movdqa %xmm1, %xmm2
+; SSE2-NEXT:    pandn %xmm4, %xmm2
----------------
This looks like we have an and with 2 not operands and we're now folding a different one to andn. I expect instcombine would have pulled the nots through the and so this is probably not a realistic case.


https://reviews.llvm.org/D53268





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