[llvm] r345282 - [AArch64][GlobalISel] Fix the LegalityPredicate for lowerIf for G_LOAD/G_STORE

[Volkan Keles via llvm-commits]

Author: volkan
Date: Thu Oct 25 10:23:25 2018
New Revision: 345282

URL: http://llvm.org/viewvc/llvm-project?rev=345282&view=rev
Log:
[AArch64][GlobalISel] Fix the LegalityPredicate for lowerIf for G_LOAD/G_STORE

Summary:
Currently, Legalizer is trying to lower G_LOAD with a vector type
that has more than two elements due to the incorrect LegalityPredicate.

This patch fixes the issue by removing the multiplication by 8
as `MemDesc.Size` already contains the size in bits.

Reviewers: dsanders, aemerson

Reviewed By: dsanders

Subscribers: rovka, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D53679

Added:
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir
Modified:
    llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp?rev=345282&r1=345281&r2=345282&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp Thu Oct 25 10:23:25 2018
@@ -167,7 +167,7 @@ AArch64LegalizerInfo::AArch64LegalizerIn
       .unsupportedIfMemSizeNotPow2()
       // Lower any any-extending loads left into G_ANYEXT and G_LOAD
       .lowerIf([=](const LegalityQuery &Query) {
-        return Query.Types[0].getSizeInBits() != Query.MMODescrs[0].Size * 8;
+        return Query.Types[0].getSizeInBits() != Query.MMODescrs[0].Size;
       })
       .clampNumElements(0, v2s32, v2s32);
 
@@ -185,7 +185,7 @@ AArch64LegalizerInfo::AArch64LegalizerIn
       .unsupportedIfMemSizeNotPow2()
       .lowerIf([=](const LegalityQuery &Query) {
         return Query.Types[0].isScalar() &&
-               Query.Types[0].getSizeInBits() != Query.MMODescrs[0].Size * 8;
+               Query.Types[0].getSizeInBits() != Query.MMODescrs[0].Size;
       })
       .clampNumElements(0, v2s32, v2s32);
 

Added: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir?rev=345282&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir (added)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-v4s32.mir Thu Oct 25 10:23:25 2018
@@ -0,0 +1,21 @@
+# RUN: not llc -march=aarch64 -o - -run-pass=legalizer -debug-only=legalizer 2>&1 %s | FileCheck %s
+# REQUIRES: asserts
+
+# CHECK: Legalize Machine IR for: load_v4s32
+# CHECK-NEXT: %{{[0-9]+}}:_(<4 x s32>) = G_LOAD %{{[0-9]+}}:_(p0)
+# CHECK-NOT: Lower
+# CHECK: unable to legalize instruction
+---
+name:            load_v4s32
+legalized:       false
+tracksRegLiveness: true
+body:             |
+  bb.1:
+    liveins: $x0
+
+    %0:_(p0) = COPY $x0
+    %1:_(<4 x s32>) = G_LOAD %0(p0) :: (load 16, align 4)
+    %2:_(s32), %3:_(s32), %4:_(s32), %5:_(s32) = G_UNMERGE_VALUES %1(<4 x s32>)
+    $w0 = COPY %5(s32)
+
+...