[PATCH] D53235: [RISCV] Add RV64F codegen support

Alex Bradbury via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 25 06:42:19 PDT 2018


asb updated this revision to Diff 171079.
asb marked an inline comment as done.
asb edited the summary of this revision.
asb added a comment.

Updated to use target DAG combines for the int/float conversions.


https://reviews.llvm.org/D53235

Files:
  lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVISelLowering.h
  lib/Target/RISCV/RISCVInstrInfoF.td
  test/CodeGen/RISCV/float-arith.ll
  test/CodeGen/RISCV/float-br-fcmp.ll
  test/CodeGen/RISCV/float-convert.ll
  test/CodeGen/RISCV/float-fcmp.ll
  test/CodeGen/RISCV/float-imm.ll
  test/CodeGen/RISCV/float-mem.ll
  test/CodeGen/RISCV/float-select-fcmp.ll
  test/CodeGen/RISCV/rv64f-float-convert.ll

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