[PATCH] D53582: [AArch64] Add EXT patterns for 64-bit EXT of a subvector of a 128-bit vector

[Dave Green via Phabricator via llvm-commits]

dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

I've managed to convince myself that this looks OK. A couple of nits depending on what you think of them.

Otherwise LGTM.



================
Comment at: lib/Target/AArch64/AArch64InstrInfo.td:4164
 
+def AdjustExtImm : SDNodeXForm<imm, [{
+  return CurDAG->getTargetConstant(8 + N->getZExtValue(), SDLoc(N), MVT::i64);
----------------
Perhaps call this Add8 or something like it? Up to you.


================
Comment at: lib/Target/AArch64/AArch64InstrInfo.td:4165
+def AdjustExtImm : SDNodeXForm<imm, [{
+  return CurDAG->getTargetConstant(8 + N->getZExtValue(), SDLoc(N), MVT::i64);
+}]>;
----------------
It looks like the i64 from here is an i32 everywhere else


Repository:
  rL LLVM

https://reviews.llvm.org/D53582