[PATCH] D52779: AMD BdVer2 (Piledriver) Initial Scheduler model

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb accepted this revision.
andreadb added a comment.
This revision is now accepted and ready to land.

I am okay with accepting this patch, provided that you fix the store throughput. If not in this patch, then it should definitely be addressed by a follow-up patch.
At the moment, your model assumes a maximum throughput of two store operations per cycle, which is incorrect.

You may want to do something similar to what we did for Jaguar, where the AGU scheduler is defined as a resource-group; we provide distinct definitions for the load/store AGEN pipes.
You can probaby do the same; if I understand correctly, that should be enough to fix your issue with the store throughput.

If for some reasons it takes time to fix, then you can commit this patch in the meantime.
Basically, you can commit this change for now, and raise a bug for the store throughput issue (so that we don't forget about fixing it).

Thanks,
Andrea


Repository:
  rL LLVM

https://reviews.llvm.org/D52779