[PATCH] D52757: [X86] Bring back the MOV64r0 pseudo instruction

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 170754.
craig.topper added a comment.
Herald added a subscriber: javed.absar.

Rebase and add spill-zero-x86_64.ll to cover the stack spill case that originally prompted me to look at this. I've reduced this from a complex function that has something like 20 spills of 0 in it. This is the best I was able to reduce it. We don't seem to have any directed tests for spill a 32-bit zero either. It seems to happen in a half dozen or so larger tests.


https://reviews.llvm.org/D52757

Files:
  lib/Target/X86/X86FastISel.cpp
  lib/Target/X86/X86ISelDAGToDAG.cpp
  lib/Target/X86/X86InstrCompiler.td
  lib/Target/X86/X86InstrInfo.cpp
  lib/Target/X86/X86SpeculativeLoadHardening.cpp
  test/CodeGen/X86/GlobalISel/constant.ll
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/hoist-spill.ll
  test/CodeGen/X86/machine-cse.ll
  test/CodeGen/X86/madd.ll
  test/CodeGen/X86/mmx-arith.ll
  test/CodeGen/X86/scheduler-backtracking.ll
  test/CodeGen/X86/spill-zero-x86_64.ll
  test/CodeGen/X86/swifterror.ll

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