[PATCH] D53496: AMDGPU: Rewrite SILowerI1Copies to always stay on SALU

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SILowerI1Copies.cpp:695
+    MI = MRI->getUniqueVRegDef(Reg);
+    if (MI->getOpcode() != AMDGPU::COPY)
+      break;
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rampitec wrote:
> nhaehnle wrote:
> > rampitec wrote:
> > > MI can be null technically.
> > How? This pass runs on Machine SSA form.
> As far as I understand you may have two defs in case of a superreg.
You can't have 2 defs of a super register in SSA. The case I would worry about is if the register is undef or an argument, which I'm not sure are an issue this early


Repository:
  rL LLVM

https://reviews.llvm.org/D53496