[PATCH] D52846: [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 22 12:45:24 PDT 2018


arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIFixupVectorISel.cpp:9
+/// \file
+/// SIFixupVectorISel pass cleans up post ISEL Vector issues.
+/// Currently this will convert GLOBAL_{LOAD|STORE}_*
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rampitec wrote:
> The name of the pass is too opaque and gives no hint what pass actually doing. I think it needs to have something about "flat" in the name.
It shouldn't. This should be a general pass that isn't specifically for this one thing. There may be other SelectionDAG workarounds we want to put in here


https://reviews.llvm.org/D52846





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