[PATCH] D53562: [ARM] Use the Cortex-A57 sched model for Cortex-A72

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: john.brawn, dmgreen, fhahn.
Herald added subscribers: chrib, kristof.beyls, javed.absar.

This mirrors what we already do for AArch64 and LNT scores are improved by a geomean of 1.57%.


https://reviews.llvm.org/D53562

Files:
  lib/Target/ARM/ARM.td


Index: lib/Target/ARM/ARM.td
===================================================================
--- lib/Target/ARM/ARM.td
+++ lib/Target/ARM/ARM.td
@@ -1043,7 +1043,7 @@
                                                          FeatureAvoidPartialCPSR,
                                                          FeatureCheapPredicableCPSR]>;
 
-def : ProcNoItin<"cortex-a72",                          [ARMv8a, ProcA72,
+def : ProcessorModel<"cortex-a72", CortexA57Model,      [ARMv8a, ProcA72,
                                                          FeatureHWDivThumb,
                                                          FeatureHWDivARM,
                                                          FeatureCrypto,


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