[llvm] r344949 - X86: add alias for pushfw/popfw in Intel mode

Tim Northover via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 22 13:38:13 PDT 2018


Author: tnorthover
Date: Mon Oct 22 13:38:13 2018
New Revision: 344949

URL: http://llvm.org/viewvc/llvm-project?rev=344949&view=rev
Log:
X86: add alias for pushfw/popfw in Intel mode

A while ago we changed pushf and popf in Intel mode to generate pushfq
and popfq. Unfortunately that left us with no way to get the 16-bit
encoding in Intel mode so this patch adds pushfw and popfw as aliases
there.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.td
    llvm/trunk/test/MC/X86/intel-syntax-encoding.s

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=344949&r1=344948&r2=344949&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Oct 22 13:38:13 2018
@@ -2966,6 +2966,8 @@ def : MnemonicAlias<"popf",  "popfl", "a
 def : MnemonicAlias<"popf",  "popfq", "att">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"popf",  "popfq", "intel">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"popfd", "popfl", "att">;
+def : MnemonicAlias<"popfw", "popf",  "intel">, Requires<[In32BitMode]>;
+def : MnemonicAlias<"popfw", "popf",  "intel">, Requires<[In64BitMode]>;
 
 // FIXME: This is wrong for "push reg".  "push %bx" should turn into pushw in
 // all modes.  However: "push (addr)" and "push $42" should default to
@@ -2978,6 +2980,8 @@ def : MnemonicAlias<"pushf",  "pushfl",
 def : MnemonicAlias<"pushf",  "pushfq", "att">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"pushf",  "pushfq", "intel">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"pushfd", "pushfl", "att">;
+def : MnemonicAlias<"pushfw", "pushf",  "intel">, Requires<[In32BitMode]>;
+def : MnemonicAlias<"pushfw", "pushf",  "intel">, Requires<[In64BitMode]>;
 
 def : MnemonicAlias<"popad",  "popal",  "intel">, Requires<[Not64BitMode]>;
 def : MnemonicAlias<"pushad", "pushal", "intel">, Requires<[Not64BitMode]>;

Modified: llvm/trunk/test/MC/X86/intel-syntax-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax-encoding.s?rev=344949&r1=344948&r2=344949&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-encoding.s (original)
+++ llvm/trunk/test/MC/X86/intel-syntax-encoding.s Mon Oct 22 13:38:13 2018
@@ -64,6 +64,11 @@
 pushf
 popf
 
+// CHECK: encoding: [0x66,0x9c]
+// CHECK: encoding: [0x66,0x9d]
+pushfw
+popfw
+
 LBB0_3:
 // CHECK: encoding: [0xeb,A]
 	jmp	LBB0_3




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