[llvm] r344937 - Revert rL344931 from llvm/trunk: [X86][SSE] getTargetShuffleMaskIndices - allow opt-in support for whole undef shuffle mask elements

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 22 12:01:26 PDT 2018


Author: rksimon
Date: Mon Oct 22 12:01:25 2018
New Revision: 344937

URL: http://llvm.org/viewvc/llvm-project?rev=344937&view=rev
Log:
Revert rL344931 from llvm/trunk: [X86][SSE] getTargetShuffleMaskIndices - allow opt-in support for whole undef shuffle mask elements
We can't safely assume that certain RawMask entries are UNDEF as most variable shuffles ignore non-index bits - PSHUFB only works on i8 elts so it'd be safe to use but I'm intending to come up with an alternative approach that works for all.
........
Enable this for PSHUFB constant mask decoding and remove the ConstantPool DecodePSHUFBMask

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=344937&r1=344936&r2=344937&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Oct 22 12:01:25 2018
@@ -5839,23 +5839,20 @@ static bool isConstantSplat(SDValue Op,
 
 static bool getTargetShuffleMaskIndices(SDValue MaskNode,
                                         unsigned MaskEltSizeInBits,
-                                        SmallVectorImpl<uint64_t> &RawMask,
-                                        bool AllowWholeUndefs = false) {
+                                        SmallVectorImpl<uint64_t> &RawMask) {
   APInt UndefElts;
   SmallVector<APInt, 64> EltBits;
 
   // Extract the raw target constant bits.
+  // FIXME: We currently don't support UNDEF bits or mask entries.
   if (!getTargetConstantBitsFromNode(MaskNode, MaskEltSizeInBits, UndefElts,
-                                     EltBits, AllowWholeUndefs,
+                                     EltBits, /* AllowWholeUndefs */ false,
                                      /* AllowPartialUndefs */ false))
     return false;
 
   // Insert the extracted elements into the mask.
-  for (int i = 0, e = EltBits.size(); i != e; ++i) {
-    uint64_t M = AllowWholeUndefs && UndefElts[i] ? SM_SentinelUndef
-                                                  : EltBits[i].getZExtValue();
-    RawMask.push_back(M);
-  }
+  for (APInt Elt : EltBits)
+    RawMask.push_back(Elt.getZExtValue());
 
   return true;
 }
@@ -6060,10 +6057,14 @@ static bool getTargetShuffleMask(SDNode
     IsUnary = true;
     SDValue MaskNode = N->getOperand(1);
     SmallVector<uint64_t, 32> RawMask;
-    if (getTargetShuffleMaskIndices(MaskNode, 8, RawMask, true)) {
+    if (getTargetShuffleMaskIndices(MaskNode, 8, RawMask)) {
       DecodePSHUFBMask(RawMask, Mask);
       break;
     }
+    if (auto *C = getTargetConstantFromNode(MaskNode)) {
+      DecodePSHUFBMask(C, Mask);
+      break;
+    }
     return false;
   }
   case X86ISD::VPERMI:




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