[PATCH] D53252: [WebAssembly] Implement vector sext_inreg and tests with comparisons

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added inline comments.


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Comment at: test/CodeGen/WebAssembly/simd-comparisons.ll:812
+; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
+; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
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tlively wrote:
> aheejin wrote:
> > What is this sequence? Why does one instruction become four? 😨Why does this try to compare `$0` with `$0`?
> This is *ordered* not equals, but WebAssembly's `ne` is unordered. This sequence checks `$0 == $0 &&  $1 == $1`, which is true only if neither `$0` or `$1` are NaN. Ordered equals should only return true If `ne` returns true and neither argument is `NaN`.
> 
> Other strange sequences below are similar.
I see, so before they were also generated but test didn't include them. Thanks.


Repository:
  rL LLVM

https://reviews.llvm.org/D53252