[PATCH] D53283: AMDGPU: Divergence-driven selection of scalar buffer load intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:4824-4827
+  if (VT == MVT::v8i32 || VT == MVT::v16i32) {
+    NumLoads = VT == MVT::v16i32 ? 4 : 2;
+    LoadVT = MVT::v4i32;
+  }
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I don't love the hardcoded types here. Can you assert on the sizes, in case we fix casting all mem operations to int?


Repository:
  rL LLVM

https://reviews.llvm.org/D53283