[PATCH] D53320: [llvm-exegeis] Computing Latency configuration upfront so we can generate many CodeTemplates at once.

[Clement Courbet via Phabricator via llvm-commits]

courbet added inline comments.


================
Comment at: tools/llvm-exegesis/lib/CodeTemplate.h:53
+  SERIAL_VIA_TIED_REGS = 1u << 1,
+  SERIAL_VIA_MEMORY_INSTR = 1u << 2,
+  SERIAL_VIA_EXPLICIT_REGS = 1u << 3,
----------------
There is a large difference between e.g. this one and `SERIAL_VIA_IMPLICIT_REGS`. The latter indicates that the inst is always serial, the former that it can be made serial. Maybe rename `SERIAL_VIA_IMPLICIT_REGS` to `ALWAYS_SERIAL_VIA_IMPLICIT_REGS` ?


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Comment at: tools/llvm-exegesis/lib/CodeTemplate.h:53
+  SERIAL_VIA_TIED_REGS = 1u << 1,
+  SERIAL_VIA_MEMORY_INSTR = 1u << 2,
+  SERIAL_VIA_EXPLICIT_REGS = 1u << 3,
----------------
courbet wrote:
> There is a large difference between e.g. this one and `SERIAL_VIA_IMPLICIT_REGS`. The latter indicates that the inst is always serial, the former that it can be made serial. Maybe rename `SERIAL_VIA_IMPLICIT_REGS` to `ALWAYS_SERIAL_VIA_IMPLICIT_REGS` ?
Add doc for each one of these, e.g. "The instruction can be made serial by adding a back-to-back instruction that reads/writes to memory."


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Comment at: tools/llvm-exegesis/lib/Latency.cpp:104
+  case Execution::SERIAL_VIA_EXPLICIT_REGS: {
+    // Select head to toe memory instruction.
+    const AliasingConfigurations SelfAliasing(Instr, Instr);
----------------
back-to-back ? :D


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Comment at: tools/llvm-exegesis/lib/Latency.cpp:104
+  case Execution::SERIAL_VIA_EXPLICIT_REGS: {
+    // Select head to toe memory instruction.
+    const AliasingConfigurations SelfAliasing(Instr, Instr);
----------------
courbet wrote:
> back-to-back ? :D
I don't get this comment.


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Comment at: tools/llvm-exegesis/lib/Latency.cpp:120
+  case Execution::SERIAL_VIA_NON_MEMORY_INSTR: {
+    // Select head to toe non-memory instruction.
+    for (const auto OtherInstr :
----------------
ditto


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Comment at: unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp:60
 
   CodeTemplate checkAndGetCodeTemplate(unsigned Opcode) {
     randomGenerator().seed(0); // Initialize seed.
----------------
`checkAndGetBestCodeTemplate`


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Comment at: unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp:63
     const Instruction Instr(State, Opcode);
     auto CodeTemplateOrError = Generator.generateCodeTemplates(Instr);
     EXPECT_FALSE(CodeTemplateOrError.takeError()); // Valid configuration.
----------------
Please add a comment on `generateCodeTemplates` as to the order of templates.


Repository:
  rL LLVM

https://reviews.llvm.org/D53320