[PATCH] D53201: [DAGCombiner] reduce insert+bitcast+extract vector ops to truncate (PR39016)

[Sanjay Patel via Phabricator via llvm-commits]

spatel updated this revision to Diff 169563.
spatel marked 2 inline comments as done.
spatel added a comment.

Patch updated:

1. Add "LegalTypes" as the first predicate for trying this transform to make it less likely that any weird types invalidate the later assumptions.
2. Add an assert that the scalar bitwidth is a multiple of the vector element bitwidth (scalar_to_vector size must be a multiple, and bitcast can't change size).
3. Add a test that at least starts with a weird type in IR.


https://reviews.llvm.org/D53201

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AArch64/extract-insert.ll
  test/CodeGen/X86/extract-insert.ll
  test/CodeGen/X86/mmx-coalescing.ll

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