[PATCH] D53174: X86/TargetTransformInfo: Report div/rem constant immediate costs as TCC_Free

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This revision was automatically updated to reflect the committed changes.
Closed by commit rL344315: X86/TargetTransformInfo: Report div/rem constant immediate costs as TCC_Free (authored by matze, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D53174?vs=169325&id=169338#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D53174

Files:
  llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/trunk/test/Transforms/ConstantHoisting/X86/bad-cases.ll


Index: llvm/trunk/test/Transforms/ConstantHoisting/X86/bad-cases.ll
===================================================================
--- llvm/trunk/test/Transforms/ConstantHoisting/X86/bad-cases.ll
+++ llvm/trunk/test/Transforms/ConstantHoisting/X86/bad-cases.ll
@@ -0,0 +1,47 @@
+; RUN: opt -consthoist -S < %s | FileCheck %s
+target triple = "x86_64--"
+
+; We don't want to convert constant divides because the benefit from converting
+; them to a mul in the backend is larget than constant materialization savings.
+define void @signed_const_division(i64 %in1, i64 %in2, i64* %addr) {
+; CHECK-LABEL: @signed_const_division
+; CHECK: %res1 = sdiv i64 %l1, 4294967296
+; CHECK: %res2 = srem i64 %l2, 4294967296
+entry:
+  br label %loop
+
+loop:
+  %l1 = phi i64 [%res1, %loop], [%in1, %entry]
+  %l2 = phi i64 [%res2, %loop], [%in2, %entry]
+  %res1 = sdiv i64 %l1, 4294967296
+  store volatile i64 %res1, i64* %addr
+  %res2 = srem i64 %l2, 4294967296
+  store volatile i64 %res2, i64* %addr
+  %again = icmp eq i64 %res1, %res2
+  br i1 %again, label %loop, label %end
+
+end:
+  ret void
+}
+
+define void @unsigned_const_division(i64 %in1, i64 %in2, i64* %addr) {
+; CHECK-LABEL: @unsigned_const_division
+; CHECK: %res1 = udiv i64 %l1, 4294967296
+; CHECK: %res2 = urem i64 %l2, 4294967296
+
+entry:
+  br label %loop
+
+loop:
+  %l1 = phi i64 [%res1, %loop], [%in1, %entry]
+  %l2 = phi i64 [%res2, %loop], [%in2, %entry]
+  %res1 = udiv i64 %l1, 4294967296
+  store volatile i64 %res1, i64* %addr
+  %res2 = urem i64 %l2, 4294967296
+  store volatile i64 %res2, i64* %addr
+  %again = icmp eq i64 %res1, %res2
+  br i1 %again, label %loop, label %end
+
+end:
+  ret void
+}
Index: llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -2342,11 +2342,15 @@
       return TTI::TCC_Free;
     ImmIdx = 1;
     break;
-  case Instruction::Mul:
   case Instruction::UDiv:
   case Instruction::SDiv:
   case Instruction::URem:
   case Instruction::SRem:
+    // Division by constant is typically expanded later into a different
+    // instruction sequence. This completely changes the constants.
+    // Report them as "free" to stop ConstantHoist from marking them as opaque.
+    return TTI::TCC_Free;
+  case Instruction::Mul:
   case Instruction::Or:
   case Instruction::Xor:
     ImmIdx = 1;


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