[llvm] r344309 - [RISCV] Fix disassembling of fence instruction with invalid field

[Ana Pazos via llvm-commits]

Author: apazos
Date: Thu Oct 11 15:49:13 2018
New Revision: 344309

URL: http://llvm.org/viewvc/llvm-project?rev=344309&view=rev
Log:
[RISCV] Fix disassembling of fence instruction with invalid field

Summary:
Instruction with 0 in fence field being disassembled as fence , iorw.
Printing "unknown" to match GAS behavior.

This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer
for the RISC-V assembly language.

Reviewers: asb

Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, jfb, PkmX, jocewei, asb

Differential Revision: https://reviews.llvm.org/D51828

Added:
    llvm/trunk/test/MC/Disassembler/RISCV/unknown-fence-field.txt
Modified:
    llvm/trunk/lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp
    llvm/trunk/test/MC/RISCV/rv32i-invalid.s

Modified: llvm/trunk/lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp?rev=344309&r1=344308&r2=344309&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp Thu Oct 11 15:49:13 2018
@@ -93,6 +93,8 @@ void RISCVInstPrinter::printFenceArg(con
                                      const MCSubtargetInfo &STI,
                                      raw_ostream &O) {
   unsigned FenceArg = MI->getOperand(OpNo).getImm();
+  assert (((FenceArg >> 4) == 0) && "Invalid immediate in printFenceArg");
+
   if ((FenceArg & RISCVFenceField::I) != 0)
     O << 'i';
   if ((FenceArg & RISCVFenceField::O) != 0)
@@ -101,6 +103,8 @@ void RISCVInstPrinter::printFenceArg(con
     O << 'r';
   if ((FenceArg & RISCVFenceField::W) != 0)
     O << 'w';
+  if (FenceArg == 0)
+    O << "unknown";
 }
 
 void RISCVInstPrinter::printFRMArg(const MCInst *MI, unsigned OpNo,

Added: llvm/trunk/test/MC/Disassembler/RISCV/unknown-fence-field.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/RISCV/unknown-fence-field.txt?rev=344309&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/RISCV/unknown-fence-field.txt (added)
+++ llvm/trunk/test/MC/Disassembler/RISCV/unknown-fence-field.txt Thu Oct 11 15:49:13 2018
@@ -0,0 +1,9 @@
+# RUN: llvm-mc -disassemble -triple=riscv32 < %s 2>&1 | FileCheck %s
+# RUN: llvm-mc -disassemble -triple=riscv64 < %s 2>&1 | FileCheck %s
+#
+# Test generated by a LLVM MC Disassembler Protocol Buffer Fuzzer
+# for the RISC-V assembly language.
+
+# This decodes as fence , iorw with invalid fence field as 0.
+[0x0f 0x00 0xf0 0x00]
+# CHECK: fence unknown, iorw

Modified: llvm/trunk/test/MC/RISCV/rv32i-invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/RISCV/rv32i-invalid.s?rev=344309&r1=344308&r2=344309&view=diff
==============================================================================
--- llvm/trunk/test/MC/RISCV/rv32i-invalid.s (original)
+++ llvm/trunk/test/MC/RISCV/rv32i-invalid.s Thu Oct 11 15:49:13 2018
@@ -6,6 +6,7 @@ fence iorw, iore # CHECK: :[[@LINE]]:13:
 fence wr, wr # CHECK: :[[@LINE]]:7: error: operand must be formed of letters selected in-order from 'iorw'
 fence rw, rr # CHECK: :[[@LINE]]:11: error: operand must be formed of letters selected in-order from 'iorw'
 fence 1, rw # CHECK: :[[@LINE]]:7: error: operand must be formed of letters selected in-order from 'iorw'
+fence unknown, unknown # CHECK: :[[@LINE]]:7: error: operand must be formed of letters selected in-order from 'iorw'
 
 ## uimm5
 slli a0, a0, 32 # CHECK: :[[@LINE]]:14: error: immediate must be an integer in the range [0, 31]