[PATCH] D53134: [tblgen][llvm-mca] Add the ability to describe move elimination candidates via tablegen.

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb updated this revision to Diff 169213.
andreadb added a comment.

Patch updated:

It turns out that on Btver2, same register moves can also be optimized at register renaming stage. I verified this with perf. Also, GPR zero moves can be optimized too. Thanks @RKSimon for pointing this out.


https://reviews.llvm.org/D53134

Files:
  include/llvm/CodeGen/TargetSubtargetInfo.h
  include/llvm/MC/MCInstrAnalysis.h
  include/llvm/MC/MCSchedule.h
  include/llvm/Target/TargetInstrPredicate.td
  include/llvm/Target/TargetSchedule.td
  lib/Target/X86/X86ScheduleBtVer2.td
  test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-1.s
  test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-2.s
  test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-3.s
  test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-4.s
  test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-5.s
  tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
  tools/llvm-mca/lib/InstrBuilder.cpp
  utils/TableGen/CodeGenSchedule.cpp
  utils/TableGen/CodeGenSchedule.h
  utils/TableGen/SubtargetEmitter.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D53134.169213.patch
Type: text/x-patch
Size: 49454 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20181011/2a069657/attachment.bin>