[PATCH] D53041: Remove FeatureRTM from Skylake processor list
Thiago Macieira via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 9 13:59:05 PDT 2018
thiagomacieira created this revision.
thiagomacieira added reviewers: erichkeane, craig.topper.
Herald added a subscriber: llvm-commits.
There are a LOT of Skylakes and later without TSX-NI. Examples:
- SKL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3-20-GHz-
- KBL: https://ark.intel.com/products/97540/Intel-Core-i7-7560U-Processor-4M-Cache-up-to-3-80-GHz-
- KBL-R: https://ark.intel.com/products/149091/Intel-Core-i7-8565U-Processor-8M-Cache-up-to-4-60-GHz-
- CNL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3_20-GHz
This feature seems to be present only on high-end desktop and server
chips (I can't find any SKX without). This commit leaves it disabled
for all processors, but can be re-enabled for specific builds with
-mrtm.
Repository:
rL LLVM
https://reviews.llvm.org/D53041
Files:
lib/Target/X86/X86.td
Index: lib/Target/X86/X86.td
===================================================================
--- lib/Target/X86/X86.td
+++ lib/Target/X86/X86.td
@@ -794,7 +794,6 @@
def SKLFeatures : ProcessorFeatures<BDWFeatures.Value, [
FeatureAES,
FeatureMPX,
- FeatureRTM,
FeatureXSAVEC,
FeatureXSAVES,
FeatureCLFLUSHOPT,
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